[U-Boot] [PATCH 08/28] ddr: altera: sdram: Clean up set_sdr_fifo_cfg()

[Marek Vasut]

Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <ma...@denx.de>
---
 drivers/ddr/altera/sdram.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c
index d8d04f4..8db8dde 100644
--- a/drivers/ddr/altera/sdram.c
+++ b/drivers/ddr/altera/sdram.c
@@ -405,14 +405,14 @@ static void set_sdr_static_cfg(void)
 
 static void set_sdr_fifo_cfg(void)
 {
-       debug("Configuring FIFOCFG\n");
-       clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE <<
-                       SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB);
-
-       clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC <<
+       const u32 fifo_cfg =
+               (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE <<
+                       SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB)       |
+               (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC <<
                        SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB);
+
+       debug("Configuring FIFOCFG\n");
+       writel(fifo_cfg, &sdr_ctrl->fifo_cfg);
 }
 
 static void set_sdr_mp_weight(void)
-- 
2.1.4

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