On Wed, 2015-07-29 at 13:13 -0700, Tom Warren wrote: > Added PLL variables (dividers mask/shift, lock enable/detect, etc.) > to new pllinfo struct for each Soc/PLL. PLLA/C/D/E/M/P/U/X. > > Used pllinfo struct in all clock functions, validated on T210. > Should be equivalent to prior code on T124/114/30/20 but needs test. > > Corrections to divm mask vs shift and T20/30 divN masks thanks to > Marcel Ziswiler. > > Signed-off-by: Tom Warren <[email protected]>
While this boots on Colibri T20/T30 as well as Apalis T30 there is still something askew on T20 as e.g. USB Ethernet is more than 6 times slower than before. T30 on the other hand seems to work fine. I will try to find some time to investigate further. _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
