For accessing SPI-NOR flash's with > 16MiB we have two choices like
Bank/Extended and 4-byte addressing register support.
Status in u-boot:
1) BAR (Bank/Extended)
- Added support in u-boot already, tested
2) 4-byte addressing
- No support yet
- Hou Zhiqiang sent patches, those are review.
Ideally we may support any one of them, but there is some situation
where (q)spi controller can only support 3-byte addressing (not
supporting 4-byte addressing) but the connected flash could be >
16MiB, example: Xilinx Zynq QSPI
In this case as controller not supporting 4-byte commands we must use
BAR for accessing > 16MiB flash's.
Siva, suggested like from controller driver (spi_slave {} ) we need to
inform the flash about addressing width, so-that flash can configure
accordingly.
I indeed agree with this, and if we have both supported then the flash
will configure accordingly with controller check.
Pls- share for any other thoughts.
thanks!
--
Jagan | openedev.
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