On Tuesday, September 01, 2015 at 10:41:31 AM, Jian Luo wrote: > Hi! Hi,
> I've read about an implementation requirement regarding the usage of > FPGA/HPS SDRAM bridge. > (Link and Text attached at the end.) > > The 3. step involves writing the APPLYCFG bit in the STATICCFG register > while the SDRAM interface is completely IDLE. > IMHO, it's only possible in SPL stage where everything runs in SRAM. > FPGA however can not be configured until U-Boot is ready (step 2). > So warm reset should be performed after FPGA configuration. > > My idea is to patch sdram.c to dynamically write FPGAPORTRST and > APPLYCFG based on information in sysmgr_regs->romcodegrp_bootromswstate. > > Is any one working on this? We do this sort of stuff by running code from cache, see socfpga_sdram_apply_static_cfg() in arch/arm/mach-socfpga/misc.c . You want to use the "bridge enable" and "bridge disable" commands to enable/disable the bridges between FPGA and HPS in U-Boot. Hope that helps ;-) Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
