On Tue, 2015-09-01 at 11:01 +0200, [email protected] wrote:
> On Tuesday, September 01, 2015 at 10:46:47 AM, Chin Liang See wrote:
> > Ensuring spi_calibration is run when there is a change of sclk
> > frequency. This will ensure the qspi flash access works for high
> > sclk frequency
> >
> > Signed-off-by: Chin Liang See <[email protected]>
> > Cc: Dinh Nguyen <[email protected]>
> > Cc: Marek Vasut <[email protected]>
> > Cc: Stefan Roese <[email protected]>
> > Cc: Vikas Manocha <[email protected]>
> > Cc: Jagannadh Teki <[email protected]>
> > Cc: Pavel Machek <[email protected]>
> > ---
> > drivers/spi/cadence_qspi.c | 3 +++
> > 1 files changed, 3 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> > index 34a0f46..512bf2d 100644
> > --- a/drivers/spi/cadence_qspi.c
> > +++ b/drivers/spi/cadence_qspi.c
> > @@ -128,6 +128,9 @@ static int cadence_spi_set_speed(struct udevice *bus,
> > uint hz)
> >
> > cadence_spi_write_speed(bus, hz);
> >
> > + /* to ensure spi_calibration is run when SCLK frequency change */
> > + plat->max_hz = hz;
> > +
>
> This looks like a hack, doesn't this change just subvert the condition
> below to enforce the calibration ?
Nope. I checked through debugger where plat->max_hz is initialized once
with the value from device tree. When you use sf probe to change
frequency, the value is not reflected to plat->max_hz. Hence the
calibration is not run when frequency change. That lead to the sf probe
fail when running at 80MHz or higher. Note the priv->qspi_calibrated_hz
is updated after calibration succeed.
Thanks
Chin Liang
>
> > /* Calibration required for different SCLK speed or chip select */
> > if (priv->qspi_calibrated_hz != plat->max_hz ||
> > priv->qspi_calibrated_cs != spi_chip_select(bus)) {
>
> Best regards,
> Marek Vasut
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