Hi Stefano,
Today I grabbed a different Hardware with a bigger NAND chip (512
instead of 256MB).
At this hardware, SPL is not able to jump to U-Boot. So currently I
assume that I might have some problems when flashing.
Would you be so kind to review my header file if I miss something or if
there is something completely wrong?! (I attached it)
The commands I use to flash are the following:
> ./kobs-ng init -v -x SPL
> nandwrite --start=0x11000 --pad /dev/mtd0 u-boot.uim (I also
tried to flash u-boot.bin and u-boot.imx)
The output I get at boot are the following, but then it stucks.
.......
>>spl:board_init_r()
using memory 0x18300000-0x1b500000 for malloc()
spl_init()
boot device - 4
spl: nand - using hw ecc
NAND : 0x01:0xdc erasesize=1 (>>0)
writesize=-1 (>>0)
oobsize=65535
chipsize=1095216660225
Not support the NAND chips whose oob size is larger then 1024 bytes!
1044479 MiB
nand_spl_load_image offset:0x00011000 len:64 page:69632
mkimage signature not found - ih_magic = 0
nand_spl_load_image offset:0x00011000 len:409600 page:69632
Jumping to U-Boot
loaded - jumping to U-Boot...image entry point: 0x17800000
On 09/24/2015 11:25 AM, Stefano Babic wrote:
Hi Markus,
On 23/09/2015 10:02, Markus Stelzhammer wrote:
Hi all,
I'm currently working on the port of u-boot for our custom boards.
Previously we were using u-boot based on v2013.04 without SPL for our
boards (we have boards with SD also) and this worked for all of our
devices.
As we now have new boards with different (bigger) RAM, I decided to use
the newest bootloader (v2015.10) and enable SPL support.
This is already working on a board with SD-Card but I'm not getting it
to work on the boards with NAND.
When I try to boot, SPL is detecting and loading u-boot but u-boot
throws a "data abort" during "ubifs mount".
u-boot ist also in NAND ? Then SPL has configured correctly the device
else u-boot was not loaded.
The strange thing for me is that when I disable SPL, the board will boot
properly.
You can try to follow the data abort and check which addresses are
involved. We cannot underestimate that the bug is still present in
u-boot, but it appears only together with SPL.
Could anyone give me a hint how I could trace this error?
I can also provide logs or code snippets if needed!
Some initialization done previously in u-boot, is done now by SPL -
check your code if there is something missing.
As your board is not mainlined, we cannot help a much with code.
Best regards,
Stefano Babic
Best regards,
Markus
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
*
* Configuration settings for the Wandboard.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define DEBUG
#define CONFIG_MX6DL
#include "mx6_common.h"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_PAD_TO 0x11000
#include "imx6_spl.h"
#define CONFIG_SPL_EXT_SUPPORT
#if 1
#define CONFIG_SPL_DISABLE_OF_CONTROL
#define CONFIG_SPL_DMA_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO/*(69 * SZ_1M)*/
#endif
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (30 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_CONSOLE_DEV "ttymxc1"
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* Command definition */
#define CONFIG_CMD_BMODE
#if 0
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
#endif
#define CONFIG_CMD_MEMINFO
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* NAND support */
#if 1
#define CONFIG_CMD_TIME
#endif
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif
/* MTD stuff */
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define MTDIDS_DEFAULT "nand0=gpmi-nand"
#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:15m(uboot),1m(sram),-(ubisystem)"
/* UBIFS stuff */
#define CONFIG_CMD_UBI /* UBI commands */
#define CONFIG_CMD_UBIFS /* UBIFS commands */
#define CONFIG_RBTREE
#define CONFIG_LZO /* LZO is needed for UBIFS */
/* MMC Configuration */
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
/* USB Configs */
#if 1
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#endif
#if 1
/* Ethernet Configuration */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#endif
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sigmatek_mx6.dtb"
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"uimage=uImage\0" \
"console=" CONFIG_CONSOLE_DEV "\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdt_addr=0x11000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
"mmcargs=setenv bootargs ${consoleparam} " \
"root=${mmcroot}\0" \
"loadaddr=0x10000000\0" \
"raddr=0x11000000\0" \
"loadEnvFile=" \
"if ${loadcommand} ${loadcmdargs} ${loadaddr} uEnv.txt; then " \
"env import -t ${loadaddr} ${filesize}; " \
"fi;\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=${loadcommand} ${loadaddr} ${uimage}\0" \
"loadfdt=${loadcommand} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootm; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootm; " \
"fi;\0" \
"sigmatekboot=" \
"if ${loadcommand} ${loadcmdargs} 0x10000000 update; then " \
"if ${loadcommand} ${loadcmdargs} ${raddr} backup/uRamdisk; then " \
"true; " \
"else " \
"${loadcommand} ${loadcmdargs} ${raddr} uRamdisk; " \
"fi; " \
"if ${loadcommand} ${loadcmdargs} ${loadaddr} backup/uImage; then " \
"true; " \
"else " \
"${loadcommand} ${loadcmdargs} ${loadaddr} uImage; " \
"fi; " \
"setenv bootargs ${consoleparam} ${sigmatekversion} ${optargs} ${video} ${mtdparts} ${ubiattach} root=/dev/ram0 rw ramdisk_size=32768 init=/init disk=${thedisk}; " \
"bootm ${loadaddr} ${raddr}; " \
"else " \
"if ${loadcommand} ${loadcmdargs} ${loadaddr} uImage; then " \
"true; " \
"else " \
"${loadcommand} ${loadcmdargs} ${loadaddr} backup/uImage; " \
"fi; " \
"setenv bootargs ${consoleparam} isolcpus=0 ${optargs} ${video} ${sigvid} ${cpuname} ${firstusbdrive} ${mtdparts} ${ubiattach} ${root} rootwait; " \
"bootm ${loadaddr}; " \
"fi;\0" \
"video=video=mxcfb0\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; " \
"if mmc rescan; then " \
"true; " \
"else " \
"setenv mmcdev 1; " \
"mmc dev ${mmcdev}; " \
"mmc rescan; " \
"fi; " \
"run loadEnvFile; " \
"run sigmatekboot;"
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Environment organization */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_SIZE (10 * 1024)
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_CMD_BOOTZ
#if 0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#else
#endif
#endif /* __CONFIG_H * */
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