Dear Wenyou Yang, Wenyou Yang <[email protected]> writes: >According to the SDHC specification, stopping the SD Clock is by setting >the SD Clock Enable bit in the Clock Control register at 0, instead of >setting all bits at 0. > >Before stopping the SD clock, we need to make sure all SD transactions >to complete, so add checking the CMD and DAT bits in the Presen State >register, before stopping the SD clock. > >Signed-off-by: Wenyou Yang <[email protected]> >--- > >Changes in v2: > - Add timeout to wait for the cmd & data inhibit bit > > drivers/mmc/sdhci.c | 20 ++++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-)
applied to u-boot-atmel/master, thanks! Best regards, Andreas Bießmann _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
