On Tue, Dec 1, 2015 at 12:56 PM, Marek Vasut <[email protected]> wrote: > On Tuesday, December 01, 2015 at 05:48:34 PM, [email protected] > wrote: >> From: Dinh Nguyen <[email protected]> >> >> Add miscellaneous functions(arch_early_init_r, print_cpuinfo, >> overwrite_console, enable_caches, and cpu_mmc_init). Also, the Arria10 >> has a firewall protection around the SDRAM and OCRAM. These firewalls >> are to be disabled in order for U-Boot to function. >> >> Signed-off-by: Dinh Nguyen <[email protected]> >> --- >> v2: reuse misc functions from a5/c5 >> --- >> arch/arm/mach-socfpga/misc.c | 56 >> ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 54 >> insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c >> index bbd31ef..f8aca55 100644 >> --- a/arch/arm/mach-socfpga/misc.c >> +++ b/arch/arm/mach-socfpga/misc.c >> @@ -15,6 +15,7 @@ >> #include <watchdog.h> >> #include <asm/arch/reset_manager.h> >> #include <asm/arch/scan_manager.h> >> +#include <asm/arch/sdram_a10.h> >> #include <asm/arch/system_manager.h> >> #include <asm/arch/dwmmc.h> >> #include <asm/arch/nic301.h> >> @@ -31,11 +32,16 @@ static struct socfpga_system_manager *sysmgr_regs = >> (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; >> static struct socfpga_reset_manager *reset_manager_base = >> (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS; >> -static struct nic301_registers *nic301_regs = >> - (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; > > For the sake of consistency, I'd just ifdef this with ifdef CV || AV and > the socfpga_noc stuff with ifdef A10 instead of moving things around this > way. > >> static struct scu_registers *scu_regs = >> (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; >> >> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) >> +static const struct socfpga_noc_fw_ocram *noc_fw_ocram_base = >> + (void *)SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS; >> +static const struct socfpga_noc_fw_ddr_l3 *noc_fw_ddr_l3_base = >> + (void *)SOCFPGA_SDR_FIREWALL_L3_ADDRESS; >> +#endif >> + >> int dram_init(void) >> { >> gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); >> @@ -218,10 +224,14 @@ static int socfpga_fpga_id(const bool print_id) >> #if defined(CONFIG_DISPLAY_CPUINFO) >> int print_cpuinfo(void) >> { >> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) >> + puts("CPU : Altera SOCFPGA Arria 10 Platform\n"); > > No FPGA type detection happens on A10 ? :) Also, CPU is not "Arria 10 > platform", > CPU is still Altera SoCFPGA or possibly Altera SoCFPGA Arria 10 , right ? >
The FPGA detection is probably going to be a bit different, so I'm just not going to include it for now. Dinh _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
