Hi Tom,
This includes fixes to PCI UART on CrownBay and Galileo, minor changes
to x86 timer and some clean up to ivybridge support.
The following changes since commit 8555dd88cd1a7b5dd1e76c111fe635a92223b98b:
axs10x: add support of generic EHCI USB 2.0 controller (2015-12-08
17:29:56 +0300)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git master
for you to fetch changes up to 789fa275b3750e60c60cb3d18eabc9467892c257:
x86: Remove HAVE_ACPI_RESUME (2015-12-09 17:44:56 +0800)
----------------------------------------------------------------
Bin Meng (8):
fdt: Change OF_BAD_ADDR to FDT_ADDR_T_NONE
x86: Fix PCI UART compatible string for crownbay and galileo
x86: Move i8254_init() to x86_cpu_init_f()
common: Remove timer_init() call for x86
x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE
x86: Clean up ivybridge/chrome Kconfig options
x86: Remove CPU_INTEL_SOCKET_RPGA989
x86: Remove HAVE_ACPI_RESUME
arch/x86/cpu/Makefile | 1 -
arch/x86/cpu/cpu.c | 5 +++++
arch/x86/cpu/ivybridge/Kconfig | 70
+---------------------------------------------------------------------
arch/x86/cpu/ivybridge/cpu.c | 9 ---------
arch/x86/cpu/ivybridge/lpc.c | 9 ---------
arch/x86/cpu/ivybridge/northbridge.c | 16 ----------------
arch/x86/dts/crownbay.dts | 8 ++++----
arch/x86/dts/galileo.dts | 2 +-
board/google/chromebook_link/Kconfig | 3 ---
board/google/chromebox_panther/Kconfig | 3 ---
common/board_f.c | 2 +-
common/fdt_support.c | 3 ++-
drivers/pci/pci_rom.c | 8 --------
drivers/timer/tsc_timer.c | 10 ----------
include/configs/x86-chromebook.h | 1 -
15 files changed, 14 insertions(+), 136 deletions(-)
Regards,
Bin
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