These nodes are not parsed by U-Boot for now, but syncing device trees
with Linux is helpful for easier diffing.

Signed-off-by: Masahiro Yamada <[email protected]>
---

 arch/arm/dts/uniphier-ph1-ld4.dtsi     | 12 ++++++++++++
 arch/arm/dts/uniphier-ph1-pro4.dtsi    | 19 ++++++++++++++++---
 arch/arm/dts/uniphier-ph1-pro5.dtsi    | 29 +++++++++++++++++++++++++++--
 arch/arm/dts/uniphier-ph1-sld8.dtsi    | 12 ++++++++++++
 arch/arm/dts/uniphier-proxstream2.dtsi | 19 +++++++++++++++++--
 5 files changed, 84 insertions(+), 7 deletions(-)

diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi 
b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 13d6a74..856c207 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -19,6 +19,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -44,6 +45,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(512 * 1024)>;
+               cache-sets = <256>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58400000 {
                compatible = "socionext,uniphier-i2c";
                status = "disabled";
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi 
b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index 2880062..244ccf6 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -20,12 +20,14 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -51,6 +53,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(768 * 1024)>;
+               cache-sets = <256>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58780000 {
                compatible = "socionext,uniphier-fi2c";
                status = "disabled";
@@ -140,27 +153,27 @@
                compatible = "socionext,uniphier-ehci", "generic-ehci";
                status = "disabled";
                reg = <0x5a810100 0x100>;
+               interrupts = <0 81 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb3>;
-               interrupts = <0 81 4>;
        };
 
        usb0: usb@65a00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65a00000 0x100>;
+               interrupts = <0 134 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>;
-               interrupts = <0 134 4>;
        };
 
        usb1: usb@65c00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65c00000 0x100>;
+               interrupts = <0 137 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>;
-               interrupts = <0 137 4>;
        };
 };
 
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi 
b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 876242f..0049106 100644
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -20,12 +20,14 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -51,6 +53,29 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>;
+               interrupts = <0 190 4>, <0 191 4>;
+               cache-unified;
+               cache-size = <(2 * 1024 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+               next-level-cache = <&l3>;
+       };
+
+       l3: l3-cache@500c8000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(2 * 1024 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <256>;
+               cache-level = <3>;
+       };
+
        i2c0: i2c@58780000 {
                compatible = "socionext,uniphier-fi2c";
                status = "disabled";
@@ -131,18 +156,18 @@
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65a00000 0x100>;
+               interrupts = <0 134 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>;
-               interrupts = <0 134 4>;
        };
 
        usb1: usb@65c00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65c00000 0x100>;
+               interrupts = <0 137 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
-               interrupts = <0 137 4>;
        };
 };
 
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi 
b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index bafe343..cb28bc4 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -19,6 +19,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -44,6 +45,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>;
+               cache-unified;
+               cache-size = <(256 * 1024)>;
+               cache-sets = <256>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58400000 {
                compatible = "socionext,uniphier-i2c";
                status = "disabled";
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi 
b/arch/arm/dts/uniphier-proxstream2.dtsi
index cb7df8d..3ba6a4a 100644
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -20,24 +20,28 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <2>;
+                       next-level-cache = <&l2>;
                };
 
                cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <3>;
+                       next-level-cache = <&l2>;
                };
        };
 
@@ -63,6 +67,17 @@
 };
 
 &soc {
+       l2: l2-cache@500c0000 {
+               compatible = "socionext,uniphier-system-cache";
+               reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
+               interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
+               cache-unified;
+               cache-size = <(1280 * 1024)>;
+               cache-sets = <512>;
+               cache-line-size = <128>;
+               cache-level = <2>;
+       };
+
        i2c0: i2c@58780000 {
                compatible = "socionext,uniphier-fi2c";
                status = "disabled";
@@ -152,18 +167,18 @@
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65a00000 0x100>;
+               interrupts = <0 134 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
-               interrupts = <0 134 4>;
        };
 
        usb1: usb@65c00000 {
                compatible = "socionext,uniphier-xhci", "generic-xhci";
                status = "disabled";
                reg = <0x65c00000 0x100>;
+               interrupts = <0 137 4>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
-               interrupts = <0 137 4>;
        };
 };
 
-- 
1.9.1

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