On Mon, Jan 04, 2016 at 07:38:23PM +0100, Ladislav Michl wrote: > On Mon, Jan 04, 2016 at 12:23:36PM -0600, Scott Wood wrote: > > On Mon, 2016-01-04 at 16:54 +0100, Ladislav Michl wrote: > > > From: Thomas Gleixner <t...@linutronix.de> > > > > > > To support UBI in SPL we need a simple flash read function. Add one to > > > nand_spl_simple and keep it as simple as it goes. > > > > > > Signed-off-by: Thomas Gleixner <t...@linutronix.de> > > > > Where is your signoff? > > I'm only messenger and have nothing to do with this part of patch. The other > part which I touched has my signoff. > > > Did Thomas really write this patch for U-Boot (if so, why isn't he on CC?) > > or > > is it taken from some other project? > > Ha! It is my mailer which broke Cc. Thomas was on Cc list and still is in my > sent-mail folder. Also apologize to Marek, let's see how Cc will end this > time. > And yes, patch was written for U-Boot: > https://patchwork.ozlabs.org/patch/367305/
Well, seems to be mailman configuration: https://mail.python.org/pipermail/mailman-users/2006-May/051194.html so those who received post via mailman are seeing striped Cc line. Thanks to Nathan Lynch for pointing it out. Full Cc list: Cc: Scott Wood <o...@buserror.net> Cc: Tom Rini <tr...@konsulko.com> Cc: Heiko Schocher <h...@denx.de> Cc: Thomas Gleixner <t...@linutronix.de> Cc: Richard Weinberger <rich...@nod.at> Cc: Marek Vasut <ma...@denx.de> > > > --- > > > drivers/mtd/nand/nand_spl_simple.c | 64 > > > ++++++++++++++++++++++++++++++++++++++ > > > include/nand.h | 1 + > > > 2 files changed, 65 insertions(+) > > > > > > diff --git a/drivers/mtd/nand/nand_spl_simple.c > > > b/drivers/mtd/nand/nand_spl_simple.c > > > index e69f662..2e1af53 100644 > > > --- a/drivers/mtd/nand/nand_spl_simple.c > > > +++ b/drivers/mtd/nand/nand_spl_simple.c > > > @@ -209,6 +209,70 @@ static int nand_read_page(int block, int page, void > > > *dst) > > > } > > > #endif > > > > > > +#ifdef CONFIG_SPL_UBI > > > +/* > > > + * Temporary storage for non NAND page aligned and non NAND page sized > > > + * reads. Note: This does not support runtime detected FLASH yet, but > > > + * that should be reasonably easy to fix by making the buffer large > > > + * enough :) > > > + */ > > > +static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE]; > > > + > > > +/** > > > + * nand_spl_read_flash - Read data from flash into a buffer > > > + * @pnum: Number of the physical eraseblock > > > > s/pnum/block/g > > > > > + * @offset: Data offset from the start of @pnum > > > + * @len: Data size to read > > > + * @dest: Address of the destination buffer > > > + * > > > + * This could be further optimized if we'd have a subpage read > > > + * function in the simple code. On NAND which allows subpage reads > > > + * this would spare quite some time to readout e.g. the VID header of > > > + * UBI. > > > + * > > > + * Notes: > > > + * > > > + * @offset + @len are not allowed to be larger than a physical > > > + * erase block. No sanity check done for simplicity reasons. > > > + * > > > + * To support runtime detected flash this needs to be extended by > > > + * information about the actual flash geometry, but thats beyond the > > > + * scope of this effort and for most applications where fast boot is > > > + * required its a non issue anyway. > > > + */ > > > +int nand_spl_read_flash(u32 pnum, u32 offset, u32 len, void *dest) > > > > This name is too generic and doesn't suggest what's different compared to > > nand_spl_load_image (they both read data from flash into a buffer). > > > > How about nand_spl_read_block()? > > ok. Thinking about it more, I'd rather see nand_spl_read_peb(int peb, ... but that is not consistent with other nand reading functions. > > > +{ > > > + u32 offs, page, read, toread = len; > > > + > > > + /* Calculate the page number */ > > > + page = offset / CONFIG_SYS_NAND_PAGE_SIZE; > > > + > > > + /* Offset to the start of a flash page */ > > > + offs = offset % CONFIG_SYS_NAND_PAGE_SIZE; > > > + > > > + while (toread) { > > > + /* > > > + * Non page aligned reads go to the scratch buffer. > > > + * Page aligned reads go directly to the destination. > > > + */ > > > + if (offs || toread < CONFIG_SYS_NAND_PAGE_SIZE) { > > > + nand_read_page(pnum, page, scratch_buf); > > > + read = min(len, toread); > > > > toread is always <= len, so this is pointless. As this is the only use of > > len > > after the toread init, once this is gone you could also eliminate toread and > > just use len. > > ok, will change that. What about something like this? Changelog will be appended to v3. Btw, any comments to other patches in this serie? -- >8 -- From: Thomas Gleixner <t...@linutronix.de> Subject: nand_spl_simple: Add a simple NAND read function To support UBI in SPL we need a simple NAND read function. Add one to nand_spl_simple and keep it as simple as it goes. Signed-off-by: Thomas Gleixner <t...@linutronix.de> Signed-off-by: Ladislav Michl <la...@linux-mips.org> diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c index e69f662..cf80903 100644 --- a/drivers/mtd/nand/nand_spl_simple.c +++ b/drivers/mtd/nand/nand_spl_simple.c @@ -209,6 +209,68 @@ static int nand_read_page(int block, int page, void *dst) } #endif +#ifdef CONFIG_SPL_UBI +/* + * Temporary storage for non NAND page aligned and non NAND page sized + * reads. Note: This does not support runtime detected FLASH yet, but + * that should be reasonably easy to fix by making the buffer large + * enough :) + */ +static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE]; + +/** + * nand_spl_read_block - Read data from physical eraseblock into a buffer + * @block: Number of the physical eraseblock + * @offset: Data offset from the start of @peb + * @len: Data size to read + * @dst: Address of the destination buffer + * + * This could be further optimized if we'd have a subpage read + * function in the simple code. On NAND which allows subpage reads + * this would spare quite some time to readout e.g. the VID header of + * UBI. + * + * Notes: + * @offset + @len are not allowed to be larger than a physical + * erase block. No sanity check done for simplicity reasons. + * + * To support runtime detected flash this needs to be extended by + * information about the actual flash geometry, but thats beyond the + * scope of this effort and for most applications where fast boot is + * required it is not an issue anyway. + */ +int nand_spl_read_block(int block, int offset, int len, void *dst) +{ + int page, read; + + /* Calculate the page number */ + page = offset / CONFIG_SYS_NAND_PAGE_SIZE; + + /* Offset to the start of a flash page */ + offset = offset % CONFIG_SYS_NAND_PAGE_SIZE; + + while (len) { + /* + * Non page aligned reads go to the scratch buffer. + * Page aligned reads go directly to the destination. + */ + if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) { + nand_read_page(block, page, scratch_buf); + read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset); + memcpy(dst, scratch_buf + offset, read); + offset = 0; + } else { + nand_read_page(block, page, dst); + read = CONFIG_SYS_NAND_PAGE_SIZE; + } + page++; + len -= read; + dst += read; + } + return 0; +} +#endif + int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) { unsigned int block, lastblock; diff --git a/include/nand.h b/include/nand.h index d2a53ab..2f9a1ec 100644 --- a/include/nand.h +++ b/include/nand.h @@ -124,6 +124,7 @@ int nand_unlock(nand_info_t *meminfo, loff_t start, size_t length, int nand_get_lock_status(nand_info_t *meminfo, loff_t offset); int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst); +int nand_spl_read_block(int block, int offset, int len, void *dst); void nand_deselect(void); #ifdef CONFIG_SYS_NAND_SELECT_DEVICE _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot