Hi Prabhakar,

Thanks for your feedback!

> -----Original Message-----
> From: Prabhakar Kushwaha
> Sent: 2016年1月19日 21:54
> To: Zhiqiang Hou <zhiqiang....@freescale.com>; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; mingkai...@freescale.com; york...@freescale.com
> Cc: le...@freescale.com; prabha...@freescale.com;
> bhupesh.sha...@freescale.com; s...@chromium.org; bmeng...@gmail.com;
> h...@denx.de; joe.hershber...@ni.com; ma...@denx.de; Zhiqiang Hou
> <zhiqiang....@nxp.com>; Hou Zhiqiang <b48...@freescale.com>
> Subject: RE: [PATCH 1/3] ARMv8/layerscape: Add mmu_init API
> 
> > -----Original Message-----
> > From: Zhiqiang Hou [mailto:zhiqiang....@freescale.com]
> > Sent: Tuesday, January 19, 2016 6:10 PM
> > To: u-boot@lists.denx.de; albert.u.b...@aribaud.net;
> > mingkai...@freescale.com; york...@freescale.com
> > Cc: le...@freescale.com; prabha...@freescale.com;
> > bhupesh.sha...@freescale.com; s...@chromium.org; bmeng...@gmail.com;
> > h...@denx.de; joe.hershber...@ni.com; ma...@denx.de; Zhiqiang Hou
> > <zhiqiang....@nxp.com>; Hou Zhiqiang <b48...@freescale.com>
> > Subject: [PATCH 1/3] ARMv8/layerscape: Add mmu_init API
> >
> > From: Hou Zhiqiang <b48...@freescale.com>
> >
> > Expose this API to make it reuseable when u-boot turn into other EL
> > from EL3.
> >
> > Signed-off-by: Hou Zhiqiang <b48...@freescale.com>
> > ---
> >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 24
> > ++++++++++++++++++++++++
> >  include/common.h                        |  1 +
> >  2 files changed, 25 insertions(+)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index 6ea28ed..df5670f 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -403,6 +403,30 @@ void enable_caches(void)
> >     final_mmu_setup();
> >     __asm_invalidate_tlb_all();
> >  }
> > +
> > +static void mmu_disable(void)
> > +{
> > +   if (get_sctlr() & CR_M)
> > +           set_sctlr(get_sctlr() & ~CR_M);
> > +}
> > +
> > +static void mmu_enable(void)
> > +{
> > +   if (!(get_sctlr() & CR_M))
> > +           set_sctlr(get_sctlr() | CR_M);
> > +}
> > +
> > +void mmu_init(void)
> 
> Name of function is not mapping about what it is doing.
> This function assume MMU is already enabled with early_table and it will setup
> final_mmu_setup.
> 

This function map basically with what it is doing except some I-cache operations
that will be remove from this func, and not assume the early_mmu_setup.
It assumes the relocation has been done. 

> > +{
> > +   mmu_disable();
> > +   dcache_disable();
> > +   icache_disable();
> > +   final_mmu_setup();
> > +   __asm_invalidate_tlb_all();
> > +   mmu_enable();
> > +   icache_enable();
> > +   set_sctlr(get_sctlr() | CR_C);
> > +}
> >  #endif
> 
> If I am correct board_init_r deploy final_mmu_setup via enable_caches().
> Why cannot existing framework be used.
> 

This patch aims to make final_mmu_setup() can be called flexibly in case as
When it return from PPA and execute at EL2, the MMU must be initialized
for the current EL.
Yes, the enable_caches() will call the __weak__ mmu_setup() if MMU wasn't
enabled. But for fsl layerscape platforms, the MMU has been enabled by early
mmu setup, so the __weak__ mmu_setup won't be called.

I am not know cache and mmu so much, and have some question:
For ARM:
Why there isn't a isolate API for mmu_setup, but invoke it from dcache_enable()?
If data cache won't be used, the MMU also cannot be used?

> >
> >  static inline u32 initiator_type(u32 cluster, int init_id) diff --git
> > a/include/common.h b/include/common.h index 75c78d5..57a9b30 100644
> > --- a/include/common.h
> > +++ b/include/common.h
> > @@ -757,6 +757,7 @@ void    flush_dcache_range(unsigned long start,
> > unsigned long stop);
> >  void       invalidate_dcache_range(unsigned long start, unsigned long 
> > stop);
> >  void       invalidate_dcache_all(void);
> >  void       invalidate_icache_all(void);
> > +void       mmu_init(void);
> >
> >  enum {
> >     /* Disable caches (else flush caches but leave them active) */
> > --
> > 2.1.0.27.g96db324

Thanks,
Zhiqiang

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to