On 01/21/2016 11:50 PM, Mingkai Hu wrote: > > >> -----Original Message----- >> From: Mingkai Hu >> Sent: Thursday, January 21, 2016 11:18 AM >> To: york sun; Mingkai Hu; [email protected] >> Subject: RE: [PATCH] armv8/ls1043a: Implement workaround for erratum >> A009660 >> >> >> >>> -----Original Message----- >>> From: york sun >>> Sent: Thursday, January 21, 2016 12:21 AM >>> To: Mingkai Hu; [email protected] >>> Cc: Mingkai Hu >>> Subject: Re: [PATCH] armv8/ls1043a: Implement workaround for erratum >>> A009660 >>> >>> On 01/19/2016 10:44 PM, Mingkai Hu wrote: >>>> From: Mingkai Hu <[email protected]> >>>> >>>> Memory controller performance is not optimal with default internal >>>> target queue register value, write required value for optimal DDR >>>> performance. >>>> >>>> Signed-off-by: Mingkai Hu <[email protected]> >>>> --- >>>> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 13 +++++++++++++ >>>> arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + >>>> 2 files changed, 14 insertions(+) >>>> >>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c >>>> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c >>>> index 23d6b73..485f5cd 100644 >>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c >>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c >>>> @@ -210,6 +210,18 @@ static void erratum_a009929(void) #endif } >>>> >>>> +/* >>>> + * This erratum requires setting a value to eddrtqcr1 to >>>> + * optimal the DDR performance. >>>> + */ >>>> +static void erratum_a009660(void) >>>> +{ >>>> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009660 >>>> + u32 *eddrtqcr1 = (void *)CONFIG_SYS_FSL_SCFG_ADDR + 0x20c; >>>> + out_be32(eddrtqcr1, 0x63b20042); >>>> +#endif >>>> +} >>>> + >>>> void fsl_lsch2_early_init_f(void) >>>> { >>>> struct ccsr_cci400 *cci = (struct ccsr_cci400 >>>> *)CONFIG_SYS_CCI400_ADDR; @@ -232,6 +244,7 @@ void >>>> fsl_lsch2_early_init_f(void) >>>> >>>> /* Erratum */ >>>> erratum_a009929(); >>>> + erratum_a009660(); >>>> } >>>> #endif >>>> >>>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h >>>> b/arch/arm/include/asm/arch-fsl-layerscape/config.h >>>> index 49b113d..66399b2 100644 >>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h >>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h >>>> @@ -167,6 +167,7 @@ >>>> #define GICC_BASE 0x01402000 >>>> >>>> #define CONFIG_SYS_FSL_ERRATUM_A009929 >>>> +#define CONFIG_SYS_FSL_ERRATUM_A009660 >>>> #else >>>> #error SoC not defined >>>> #endif >>>> >>> >>> NACK. >>> >>> Erratum A009660 is cancelled. The workaround is integrated into A008514. >>> Please revise workaround for A008514. Besides, you are using ARMv7 >>> offset for ARMv8. >>> Please check if this workaround applies to LS2 SoCs. While you are on >>> it, please add a comment to LS1 workaround with the word A008514 so we >>> can grep it. >>> >> >> Hi York, >> >> I discussed with design team and got the erratum in LS1043A CE before >> preparing the patch. The value (0x63b20042) is the same one described in >> A008514 of LS1021A and the register offset of LS1043A is same with the >> one used for LS1021A which is in the SCFG space. >> >> I will double check with the design team about if the erraum number is >> still A009660 and keep you in the loop. >> >> For LS2, I got the A008514 in the LS2085A CE, but 1. The value is >> 63b2_0002 which is different from the value used on ls1043 platform. >> 2. The address is in DCFG space. >> 3. I did not get the A008514 in the LS2080A CE (RevD). >> >> So it's better to confirm with design team about the value used and the >> consistence between LS2085A and LS2080A. >> > York, > > As discussed with design team, the erratum A009660 is the correct one and the > value/offset is also correct. > > Do you prefer to submit a new patch to fix ls2085 or fix it on this patch? >
Mingkai, If the erratum A009660 is republished, and A008514 is updated for LS2085/LS1021, you can keep this patch, but adding a check to make sure they are not both enabled. Please also update workaround for A008514 to reflect the latest value. Please also put a comment for the offset of eddrtqcr1. It is really confusing when different offset is used in the same file for LS2080 and LS1043. York _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
