Hello Kim, Kim Phillips schrieb: > On Tue, 18 Aug 2009 15:23:47 +0200 > Heiko Schocher <[email protected]> wrote: > >> Hello Kim, > > Hello Heiko, sorry for the late reply, > >> I actually work on an u-boot mpc8321 port (mostly identical with the kmeter1 >> port already in mainline), and I have to set the LCRR (Clock Ratio Register >> Reference Manual 10.3.1.14). As I see in >> >> cpu/mpc83xx/cpu_init.c cpu_init_f() >> >> this is done while running from flash. Hmm... the Reference manual >> says in chapter 10.3.1.14 page 474: >> >> NOTE >> For proper operation of the system, this register setting must not be altered >> while local bus memories or devices are being accessed. Special care needs >> to be taken when running instructions from an local bus controller memory. >> >> Hmm... >> >> On my board (and for example on the MPC832XEMDS) the flash is connected >> to the localbus ... and this register setting is done, while >> running from flash ... Hmm.. is this safe? > > yeah, I'm not quite sure how that works myself!
I stumbled over this, just because I didn;t set this LCRR_DBYP bit, which the CPU sets after a reset, so what Do you think about this patch? 832x, LCRR: change only the valid bits for this register Signed-off-by: Heiko Schocher <[email protected]> --- cpu/mpc83xx/cpu_init.c | 6 ++++++ include/asm-ppc/fsl_lbc.h | 4 ++++ 2 files changed, 10 insertions(+), 0 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index ea4f2af..b5f64a8 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -193,8 +193,14 @@ void cpu_init_f (volatile immap_t * im) */ im->reset.rmr = (RMR_CSRE & (1<<RMR_CSRE_SHIFT)); +#if defined(CONFIG_MPC832x) + /* LCRR - Clock Ratio Register (10.3.1.14) */ + im->lbus.lcrr = (im->lbus.lcrr & LCRR_MASK) | \ + (CONFIG_SYS_LCRR & ~LCRR_MASK); +#else /* LCRR - Clock Ratio Register (10.3.1.16) */ im->lbus.lcrr = CONFIG_SYS_LCRR; +#endif /* Enable Time Base & Decrimenter ( so we will have udelay() )*/ im->sysconf.spcr |= SPCR_TBEN; diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index a28082e..2c7a94b 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -315,6 +315,10 @@ #define LCRR_CLKDIV_4 0x00000004 #define LCRR_CLKDIV_8 0x00000008 +#if defined(CONFIG_MPC832x) +#define LCRR_MASK 0xFFFCFFF0 +#endif + /* LTEDR - Transfer Error Check Disable Register */ #define LTEDR_BMD 0x80000000 /* Bus monitor disable */ -- 1.6.0.6 -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
