Hi Marek, On 28.04.2016 00:36, Marek Vasut wrote: > The indirect write code is buggy pile of nastiness which fails horribly > when the system runs fast enough to saturate the controller. The failure > results in some pages (256B) not being written to the flash. This can be > observed on systems which run with Dcache enabled and L2 cache enabled, > like the Altera SoCFPGA. > > This patch replaces the whole unmaintainable indirect write implementation > with the one from upcoming Linux CQSPI driver, which went through multiple > rounds of thorough review and testing. While this makes the patch look > terrifying and violates all best-practices of software development, all > the patch does is it plucks out duplicate ad-hoc code distributed across > the driver and replaces it with more compact code doing exactly the same > thing. > > Signed-off-by: Marek Vasut <[email protected]> > Cc: Anatolij Gustschin <[email protected]> > Cc: Chin Liang See <[email protected]> > Cc: Dinh Nguyen <[email protected]> > Cc: Jagan Teki <[email protected]> > Cc: Pavel Machek <[email protected]> > Cc: Stefan Roese <[email protected]> > Cc: Vignesh R <[email protected]>
I've applied both patches and tested them on SR1500 (SPI-NOR used for booting and redundant environment). This is what I get upon "saveeenv": => saveenv Saving Environment to SPI Flash... SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB Erasing SPI flash...Writing to SPI flash...data abort pc : [<3ff8368a>] lr : [<3ff8301b>] reloc pc : [<010216ca>] lr : [<0102105b>] sp : 3bf54eb8 ip : 3ff82f69 fp : 00000002 r10: 00000000 r9 : 3bf5dee8 r8 : ffff0000 r7 : 00000001 r6 : 3bf54f9b r5 : 00000001 r4 : 3bf5e520 r3 : 00000000 r2 : 3bf54f9b r1 : 00000001 r0 : ffa00000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... U-Boot SPL 2016.05-rc3-00009-ge1bf9b8 (Apr 29 2016 - 11:25:46) Any idea, what might be going wrong here? Thanks, Stefan _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
