From: Rajesh Bhagat <rajesh.bha...@nxp.com>
Implements the dwc3 gadget driver support for LS1043
platform, and performs below operations:
1. Enables snooping support for DWC3 controller.
2. Enables cache coherency in LS1043 platform.
Signed-off-by: Rajat Srivastava <rajat.srivast...@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bha...@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 87 +++++++++++++++++++++-
.../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++
.../include/asm/arch-fsl-layerscape/sys_proto.h | 11 +++
drivers/usb/dwc3/core.c | 12 +++
4 files changed, 114 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 0fb5c7f..84b973d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -17,6 +17,10 @@
#ifdef CONFIG_CHAIN_OF_TRUST
#include <fsl_validate.h>
#endif
+#include <usb.h>
+#include <dwc3-uboot.h>
+#include <linux/usb/xhci-fsl.h>
+
DECLARE_GLOBAL_DATA_PTR;
@@ -318,9 +322,12 @@ void fsl_lsch2_early_init_f(void)
#if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
#endif
- /* Make SEC reads and writes snoopable */
+ /* Make SEC and USB reads and writes snoopable */
setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
- SCFG_SNPCNFGCR_SECWRSNP);
+ SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
+ SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
+ SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
+ SCFG_SNPCNFGCR_USB3WRSNP);
/*
* Enable snoop requests and DVM message requests for
@@ -336,6 +343,82 @@ void fsl_lsch2_early_init_f(void)
}
#endif
+#ifdef CONFIG_USB_DWC3
+
+#if defined(CONFIG_LS1043A)
+static struct dwc3_device dwc3_device_data0 = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = CONFIG_SYS_FSL_XHCI_USB1_ADDR,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 0,
+};
+
+static struct dwc3_device dwc3_device_data1 = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = CONFIG_SYS_FSL_XHCI_USB2_ADDR,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 1,
+};
+
+static struct dwc3_device dwc3_device_data2 = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = CONFIG_SYS_FSL_XHCI_USB3_ADDR,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 2,
+};
+
+int usb_gadget_handle_interrupts(int index)
+{
+ dwc3_uboot_handle_interrupt(index);
+ return 0;
+}
+#endif
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ switch (init) {
+ case USB_INIT_DEVICE:
+ switch (index) {
+#if defined(CONFIG_LS1043A)
+ case 0:
+ dwc3_uboot_init(&dwc3_device_data0);
+ break;
+
+ case 1:
+ dwc3_uboot_init(&dwc3_device_data1);
+ break;
+ case 2:
+ dwc3_uboot_init(&dwc3_device_data2);
+ break;
+#endif
+ default:
+ printf("Invalid Controller Index\n");
+ return -1;
+ }
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ switch (init) {
+ case USB_INIT_DEVICE:
+#if defined(CONFIG_LS1043A)
+ dwc3_uboot_exit(index);
+#endif
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+#endif
+
+
+
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 57b99d4..13ba1a6 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -328,6 +328,12 @@ struct ccsr_gur {
#define SCFG_SNPCNFGCR_SECRDSNP 0x80000000
#define SCFG_SNPCNFGCR_SECWRSNP 0x40000000
+#define SCFG_SNPCNFGCR_USB1RDSNP 0x00200000
+#define SCFG_SNPCNFGCR_USB1WRSNP 0x00100000
+#define SCFG_SNPCNFGCR_USB2RDSNP 0x00008000
+#define SCFG_SNPCNFGCR_USB2WRSNP 0x00010000
+#define SCFG_SNPCNFGCR_USB3RDSNP 0x00002000
+#define SCFG_SNPCNFGCR_USB3WRSNP 0x00004000
/* Supplemental Configuration Unit */
struct ccsr_scfg {
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
new file mode 100644
index 0000000..252c676
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright 2016 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
+#define _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
+
+
+#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_ */
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 85cc96a..5eeb71d 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
return -ENOMEM;
}
+#if defined(CONFIG_LS1043A)
+ /* Change burst beat and outstanding pipelined transfers requests */
+ dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
+ (dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) & ~0xff) | 0xf);
+ dwc3_writel(dwc->regs, DWC3_GSBUSCFG1,
+ dwc3_readl(dwc->regs, DWC3_GSBUSCFG1) | 0xf00);
+
+ /* Enable snooping */
+ dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
+ dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) | 0x22220000);
+#endif
+
if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
dwc->dr_mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
--
1.9.1
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