On 05/18/2016 09:11 PM, York Sun wrote: > Commit 34e026f9 added one extra bit to wr_lat for timing_cfg_2, but > with wrong bit position. It is bit 13 in big-endian, or left shift > 18 from LSB. This error hasn't had any impact because we don't have > fast enough DDR4 using the extra bit so far. > > Signed-off-by: York Sun <[email protected]> > > --- > > drivers/ddr/fsl/ctrl_regs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to fsl-qoriq master branch. Awaiting upstream. York _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
