On Mon, Jul 25, 2016 at 03:45:44PM +0530, Vignesh R wrote: > From: Lokesh Vutla <[email protected]> > > According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence > update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz > clock, so that driver can use the same. > > Signed-off-by: Vignesh R <[email protected]>
Reviewed-by: Tom Rini <[email protected]> -- Tom
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