Hi, On 3 August 2016 at 10:32, Fabio Estevam <feste...@gmail.com> wrote: > On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner <ste...@agner.ch> wrote: >> From: Stefan Agner <stefan.ag...@toradex.com> >> >> The page table is maintained by the CPU, hence it is safe to always >> align cache flush to a whole cache line size. This allows to use >> mmu_page_table_flush for a single page table, e.g. when configure >> only small regions through mmu_set_region_dcache_behaviour. >> >> Signed-off-by: Stefan Agner <stefan.ag...@toradex.com> > > Tested-by: Fabio Estevam <fabio.este...@nxp.com>
I'm OK with this, or a change in mmu_set_region_dcache_behaviour() to align he addresses. Reviewed-by: Simon Glass <s...@chromium.org> Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
