Hi Stefan, On 5 August 2016 at 01:18, Stefan Roese <s...@denx.de> wrote: > On 05.08.2016 09:10, Heiko Schocher wrote: >> >> Hello Bin, >> >> Am 05.08.2016 um 07:46 schrieb Bin Meng: >>> >>> Simon, Stefan, >>> >>> On Tue, Jul 26, 2016 at 8:13 PM, Stefan Roese <s...@denx.de> wrote: >>>> >>>> Hi Simon, >>>> >>>> On 25.07.2016 04:07, Simon Glass wrote: >>>>> >>>>> >>>>> On 28 June 2016 at 07:44, Stefan Roese <s...@denx.de> wrote: >>>>>> >>>>>> >>>>>> This patch adds support for the SMBus block read/write functionality. >>>>>> Other protocols like the SMBus quick command need to get added >>>>>> if this is needed. >>>>>> >>>>>> This patch also removed the SMBus related defines from the Ivybridge >>>>>> pch.h header. As they are integrated in this driver and should be >>>>>> used from here. This change is added in this patch to avoid compile >>>>>> breakage to keep the source git bisectable. >>>>>> >>>>>> Tested on a congatec BayTrail board to configure the SMSC2513 USB >>>>>> hub. >>>>>> >>>>>> Signed-off-by: Stefan Roese <s...@denx.de> >>>>>> Cc: Bin Meng <bmeng...@gmail.com> >>>>>> Cc: Simon Glass <s...@chromium.org> >>>>>> Cc: Heiko Schocher <h...@denx.de> >>>>>> --- >>>>>> Simon, I'm not sure if this change breaks your Ivybridge targets >>>>>> using the probe part of this driver. Could you please let me >>>>>> know if this works? Or let me know what needs changes here? >>>>> >>>>> >>>>> >>>>> Yes this breaks booting on link. Something odd is going on because the >>>>> call to set up I2C in ivybridge's print_cpuinfo() returns a very >>>>> strange error -726376. >>>> >>>> >>>> >>>> Hmmm, very strange. >>>> >>>>> But I then enabled CONFIG_CMD_I2C and it boots. However 'i2c probe' >>>>> produces a lot of errors like this: >>>>> >>>>> ERROR: len=0 on read >>>>> smbus_block_read (107): dev=0x3b offs=0x0 len=0x1 >>>>> smbus_block_read (136): count=0 (len=1) >>>> >>>> >>>> >>>> A general question: >>>> >>>> Is the SMBus controller on Ivybridge also exported as PCI device? If >>>> yes, can't we just use the PCI code as done for BayTrail for this >>>> platform as well? And get rid of the platform specific stuff this >>>> way? >>>> >>>> Could you send me the output of "pci 0 long" on this platform? >>>> >>> >>> Do you plan to get this I2C merged in this release? If so, please work >>> this out .. I don't feel comfortable to apply this at present. >> >> >> Full Ack. > > > I really would like to see this SMBus support upstream. As other > patches depend on this. Unfortunately I can't test on the Ivybridge > platform. I talked with Simon on #irc some days ago and he > "volunteered" (thanks again) to fix / debug this Ivybridge problem > on his board - perhaps by moving to a PCI based probing there as > well. > > Simon, did you find the time to dig into this? Please let me know if > there is something that I can do to help / assist you here. > > Thanks, > Stefan
I found one problem, which is that intel_i2c_bind() writes to BSS before it is available. That fixes the crash. I sent a few patches for that and something else I found. Also I don't think your code in intel_i2c_probe() is very different from the ivybridge code. SMB_BASE is the same as PCI_BASE_ADDRESS_4. So perhaps just drop the ivybridge code? Here's the output you asked for. => pci 0 long Scanning PCI devices on bus 0 Found PCI device 00.00.00: vendor ID = 0x8086 device ID = 0x0154 command register ID = 0x0006 status register = 0x2090 revision ID = 0x09 class code = 0x06 (Bridge device) sub class code = 0x00 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.02.00: vendor ID = 0x8086 device ID = 0x0166 command register ID = 0x0007 status register = 0x0090 revision ID = 0x09 class code = 0x03 (Display controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0000004 base address 1 = 0x00000000 base address 2 = 0xd000000c base address 3 = 0x00000000 base address 4 = 0x00001001 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.16.00: vendor ID = 0x8086 device ID = 0x1e3a command register ID = 0x0006 status register = 0x0018 revision ID = 0x04 class code = 0x07 (Simple comm. controller) sub class code = 0x80 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x80 BIST = 0x00 base address 0 = 0xe0400004 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1a.00: vendor ID = 0x8086 device ID = 0x1e2d command register ID = 0x0006 status register = 0x0290 revision ID = 0x04 class code = 0x0c (Serial bus controller) sub class code = 0x03 programming interface = 0x20 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0400400 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x5000 sub system ID = 0x4813 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1d.00: vendor ID = 0x8086 device ID = 0x1e26 command register ID = 0x0006 status register = 0x0290 revision ID = 0x04 class code = 0x0c (Serial bus controller) sub class code = 0x03 programming interface = 0x20 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0400800 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x052b sub system ID = 0x00a4 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1f.00: vendor ID = 0x8086 device ID = 0x1e5d command register ID = 0x0007 status register = 0x0210 revision ID = 0x04 class code = 0x06 (Bridge device) sub class code = 0x01 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x80 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1f.02: vendor ID = 0x8086 device ID = 0x1e03 command register ID = 0x0007 status register = 0x02b0 revision ID = 0x04 class code = 0x01 (Mass storage controller) sub class code = 0x06 programming interface = 0x01 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0x00001041 base address 1 = 0x00001049 base address 2 = 0x00001051 base address 3 = 0x00001059 base address 4 = 0x00001061 base address 5 = 0xe0401000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1f.03: vendor ID = 0x8086 device ID = 0x1e22 command register ID = 0x0003 status register = 0x0280 revision ID = 0x04 class code = 0x0c (Serial bus controller) sub class code = 0x05 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0401804 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00001081 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x02 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.16.01: vendor ID = 0x8086 device ID = 0x1e3b command register ID = 0x0006 status register = 0x0018 revision ID = 0x04 class code = 0x07 (Simple comm. controller) sub class code = 0x80 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x80 BIST = 0x00 base address 0 = 0xe0401904 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1b.00: vendor ID = 0x8086 device ID = 0x1e20 command register ID = 0x0006 status register = 0x0010 revision ID = 0x04 class code = 0x04 (Multimedia device) sub class code = 0x03 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0404004 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 Found PCI device 00.1c.00: vendor ID = 0x8086 device ID = 0x1e10 command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x01 subordinate bus number = 0x01 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe050 memory limit = 0xe040 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.01: vendor ID = 0x8086 device ID = 0x1e12 command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x02 subordinate bus number = 0x02 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe050 memory limit = 0xe040 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.02: vendor ID = 0x8086 device ID = 0x1e14 command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x03 subordinate bus number = 0x03 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x0000 memory base = 0xe050 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 bridge control = 0x0000 Found PCI device 00.1c.03: vendor ID = 0x8086 device ID = 0x1e16 command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x04 subordinate bus number = 0x04 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.04: vendor ID = 0x8086 device ID = 0x1e18 command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x05 subordinate bus number = 0x05 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.05: vendor ID = 0x8086 device ID = 0x1e1a command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x06 subordinate bus number = 0x06 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.06: vendor ID = 0x8086 device ID = 0x1e1c command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x07 subordinate bus number = 0x07 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1c.07: vendor ID = 0x8086 device ID = 0x1e1e command register ID = 0x0007 status register = 0x0010 revision ID = 0xc4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x00 cache line = 0x08 latency time = 0x00 header type = 0x81 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x08 subordinate bus number = 0x08 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2000 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1e.00: vendor ID = 0x8086 device ID = 0x2448 command register ID = 0x0007 status register = 0x0010 revision ID = 0xa4 class code = 0x06 (Bridge device) sub class code = 0x04 programming interface = 0x01 cache line = 0x00 latency time = 0x00 header type = 0x01 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000000 primary bus number = 0x00 secondary bus number = 0x09 subordinate bus number = 0x09 secondary latency timer = 0x00 IO base = 0x20 IO limit = 0x10 secondary status = 0x2280 memory base = 0xe060 memory limit = 0xe050 prefetch memory base = 0xe001 prefetch memory limit = 0xdff1 prefetch memory base upper = 0x00000000 prefetch memory limit upper = 0x00000000 IO base upper 16 bits = 0x0000 IO limit upper 16 bits = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x00 bridge control = 0x0000 Found PCI device 00.1f.06: vendor ID = 0x8086 device ID = 0x1e24 command register ID = 0x0006 status register = 0x0010 revision ID = 0x04 class code = 0x11 (DSP) sub class code = 0x80 programming interface = 0x00 cache line = 0x00 latency time = 0x00 header type = 0x00 BIST = 0x00 base address 0 = 0xe0600004 base address 1 = 0x00000000 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x0000 sub system ID = 0x0000 expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x03 min Grant = 0x00 max Latency = 0x00 => Here's what I get when I try it: => i2c dev 0 Setting bus to 0 here intel_i2c#0 SMBus controller enabled => i2c probe Valid chip addresses:smbus_block_read (107): dev=0x0 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x4 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x5 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x6 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x7 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x8 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x9 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xa offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xb offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xc offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xd offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xe offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0xf offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x10 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x11 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x12 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x13 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x14 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x15 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x16 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x17 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x18 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x19 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1a offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1b offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1c offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1d offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1e offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x1f offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x20 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x21 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x22 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x23 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x24 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x25 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x26 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x27 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x28 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x29 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2a offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2b offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2c offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2d offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2e offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x2f offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x30 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x31 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x32 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x33 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x34 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x35 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x36 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x37 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x38 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x39 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3a offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3b offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3c offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3d offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3e offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x3f offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x40 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x41 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x42 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x43 offs=0x0 len=0x1 smbus_block_read (136): count=0 (len=1) ERROR: len=0 on read smbus_block_read (107): dev=0x44 offs=0x0 len=0x1 smbus_block_read (136): count=255 (len=1) Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000058>] EFLAGS: 00010283 Original EIP :[<52fae058>] EAX: c9fffff0 EBX: ffffffff ECX: 00000000 EDX: ffffff00 ESI: ffffffff EDI: 00000004 EBP: ffffffff ESP: acd48fdc DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018 CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000 DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 DR6: ffff0ff0 DR7: 00000400 Stack: 0xacd4901c : 0xffffffff 0xacd49018 : 0xffffffff 0xacd49014 : 0xffffffff 0xacd49010 : 0xffffffff 0xacd4900c : 0xffffffff 0xacd49008 : 0xffffffff 0xacd49004 : 0xffffffff 0xacd49000 : 0xffffffff 0xacd48ffc : 0xffffffff 0xacd48ff8 : 0xffffffff 0xacd48ff4 : 0xffffffff 0xacd48ff0 : 0xffffffff 0xacd48fec : 0xffffffff 0xacd48fe8 : 0xffffffff 0xacd48fe4 : 0xffffffff 0xacd48fe0 : 0xffffffff --->0xacd48fdc : 0x00000000 0xacd48fd8 : 0x00010283 0xacd48fd4 : 0x00000010 0xacd48fd0 : 0x00000058 ### ERROR ### Please RESET the board ### Regards Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot