On Sun, 2016-08-07 at 16:05 +0200, Marek Vasut wrote: > On 08/07/2016 03:53 PM, Chin Liang See wrote: > > Ensuring the baudrate divisor value doesn't exceed the max value > > in the calculation.It will be capped at max value to ensure the > > correct value being written into the register. > > > > Signed-off-by: Chin Liang See <[email protected]> > > Cc: Marek Vasut <[email protected]> > > Cc: Jagan Teki <[email protected]> > > Cc: Dinh Nguyen <[email protected]> > > --- > > drivers/spi/cadence_qspi_apb.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/spi/cadence_qspi_apb.c > > b/drivers/spi/cadence_qspi_apb.c > > index 1a35d55..e6a8ecb 100644 > > --- a/drivers/spi/cadence_qspi_apb.c > > +++ b/drivers/spi/cadence_qspi_apb.c > > @@ -293,6 +293,10 @@ void cadence_qspi_apb_config_baudrate_div(void > > *reg_base, > > debug("%s: ref_clk %dHz sclk %dHz Div 0x%x\n", __func__, > > ref_clk_hz, sclk_hz, div); > > > > + /* ensure the baud rate doesn't exceed the max value */ > > + if (div > CQSPI_REG_CONFIG_BAUD_MASK) > > + div = CQSPI_REG_CONFIG_BAUD_MASK; > > + > > div = (div & CQSPI_REG_CONFIG_BAUD_MASK) << > > CQSPI_REG_CONFIG_BAUD_LSB; > > The capping happens here ^ already , doesn't it ?
I have initial thought too until someone file me a bug on this. The bug happen when the calculated div = 16. After and with the mask, the value writen to register is actually 0 (register field for baudrate divisor). Thanks Chin Liang > > > reg |= div; > > writel(reg, reg_base + CQSPI_REG_CONFIG); > > > > _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
