Ensuring the baudrate divisor value doesn't exceed the max value in the calculation.It will be capped at max value to ensure the correct value being written into the register.
Example of the existing bug is when calculated div = 16. After and with the mask, the value written to register is actually 0 (register field for baudrate divisor). With this fix, the value written is now 15 which is max value for baudrate divisor. Signed-off-by: Chin Liang See <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Jagan Teki <[email protected]> Cc: Dinh Nguyen <[email protected]> --- Changes for v2 - Remove the and operation with the mask - Added more details on the issue --- drivers/spi/cadence_qspi_apb.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 1a35d55..1d68379 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -293,8 +293,11 @@ void cadence_qspi_apb_config_baudrate_div(void *reg_base, debug("%s: ref_clk %dHz sclk %dHz Div 0x%x\n", __func__, ref_clk_hz, sclk_hz, div); - div = (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB; - reg |= div; + /* ensure the baud rate doesn't exceed the max value */ + if (div > CQSPI_REG_CONFIG_BAUD_MASK) + div = CQSPI_REG_CONFIG_BAUD_MASK; + + reg |= (div << CQSPI_REG_CONFIG_BAUD_LSB); writel(reg, reg_base + CQSPI_REG_CONFIG); cadence_qspi_apb_controller_enable(reg_base); -- 2.2.2 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
