On Wed, Aug 10, 2016 at 06:36:43PM +0300, Max Filippov wrote: > From: Chris Zankel <ch...@zankel.net> > > The Xtensa processor architecture is a configurable, extensible, > and synthesizable 32-bit RISC processor core provided by Cadence. > > This is the first part of the basic architecture port with changes to > common files. The 'arch/xtensa' directory, and boards and additional > drivers will be in separate commits. > > Signed-off-by: Chris Zankel <ch...@zankel.net> > Signed-off-by: Max Filippov <jcmvb...@gmail.com> > Reviewed-by: Simon Glass <s...@chromium.org> > Reviewed-by: Tom Rini <tr...@konsulko.com>
Applied to u-boot/master, thanks! -- Tom
signature.asc
Description: Digital signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
