On 08/22/2016 05:02 PM, Chin Liang See wrote: > Add Reset Manager registers structure for Stratix 10 SoC > > Signed-off-by: Chin Liang See <[email protected]> > Cc: Marek Vasut <[email protected]> > Cc: Dinh Nguyen <[email protected]> > Cc: Ley Foon Tan <[email protected]>
Acked-by: Marek Vasut <[email protected]> > --- > arch/arm/mach-socfpga/include/mach/reset_manager.h | 32 > ++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h > b/arch/arm/mach-socfpga/include/mach/reset_manager.h > index 2f070f2..1f868da 100644 > --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h > @@ -15,6 +15,7 @@ void socfpga_bridges_reset(int enable); > void socfpga_per_reset(u32 reset, int set); > void socfpga_per_reset_all(void); > > +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) > struct socfpga_reset_manager { > u32 status; > u32 ctrl; > @@ -28,11 +29,42 @@ struct socfpga_reset_manager { > u32 padding2[12]; > u32 tstscratch; > }; > +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) > +struct socfpga_reset_manager { > + u32 status; > + u32 mpu_rst_stat; > + u32 misc_stat; > + u32 padding1; > + u32 hdsk_en; > + u32 hdsk_req; > + u32 hdsk_ack; > + u32 hdsk_stall; > + u32 mpu_mod_reset; > + u32 per_mod_reset; /* stated as per0_mod_reset in S10 datasheet */ > + u32 per2_mod_reset; /* stated as per1_mod_reset in S10 datasheet */ > + u32 brg_mod_reset; > + u32 padding2; > + u32 cold_mod_reset; > + u32 padding3; > + u32 dbg_mod_reset; > + u32 tap_mod_reset; > + u32 padding4; > + u32 padding5; > + u32 brg_warm_mask; > + u32 padding6[3]; > + u32 tst_stat; > + u32 padding7; > + u32 hdsk_timeout; > + u32 mpul2flushtimeout; > + u32 dbghdsktimeout; > +}; > +#endif > > #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) > #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 > #else > #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 > +#define RSTMGR_MPUMODRST_CORE0 1 > #endif > > /* > -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
