> Hello, I thought I'd ask here before I go and make a mess of my code: > what's the easiest way to configure my board to have SMC1 use BRG1, > SCC4 use BRG2, and make my BRG1 and BRG2 use CLK2 as an input clock? > > I looked over the code and it looked like most of this is hard-coded > in the "serial.c" file to use BRG1 for everything and I think to use > BRGCLK as the BRG clock source ("serial_setdivisor" function). > > My board is similar to the EP88xc by the way. > > Thanks, > Mikhail Zaturenskiy >
I decided to first try to switch over my BRG1 to use CLK2 as the input clock, it looks like by default it is using BRGCLK. I modified the "serial_setdivisor" function in cpu/mpc8xx/serial.c to be the following (CONFIG_PPC_OPS1 is defined): ******************************************************************************* static void serial_setdivisor(volatile cpm8xx_t *cp) { #if defined CONFIG_PPC_OPS1 int divisor=(48000000 + 8*gd->baudrate)/16/gd->baudrate; // MZ - CLK2 is 48MHz #else int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate; // MZ - note: divisor = 70 or 71 at 130MHz and 115200bps #endif if(divisor/16>0x1000) { /* bad divisor, assume 50MHz clock and 9600 baud */ divisor=(50*1000*1000 + 8*9600)/16/9600; } #ifdef CONFIG_SYS_BRGCLK_PRESCALE divisor /= CONFIG_SYS_BRGCLK_PRESCALE; #endif if(divisor<=0x1000) { cp->cp_brgc1=((divisor-1)<<1) | CPM_BRG_EN; } else { cp->cp_brgc1=((divisor/16-1)<<1) | CPM_BRG_EN | CPM_BRG_DIV16; } #if defined CONFIG_PPC_OPS1 cp->cp_brgc1 |= CPM_BRG_EXTC_CLK2; // MZ - this line is an attempt at switching BRG1 input clock to CLK2 #endif } *************************************************************************** However, now my board is stuck in an infinite loop in "serial.c" function "smc_putc", when it tries to send the first character: ************************************************************ while (rtx->txbd.cbd_sc & BD_SC_READY) { WATCHDOG_RESET (); __asm__("eieio"); } *********************************** Anybody have an idea as to what I'm doing wrong? Could there be something wrong with my CLK2? Thanks, Mikhail Zaturenskiy _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot