From: Jagan Teki <jt...@openedev.com>

Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately because of some flash specific code.

Cc: Simon Glass <s...@chromium.org>
Cc: Bin Meng <bmeng...@gmail.com>
Cc: Michal Simek <michal.si...@xilinx.com>
Cc: Siva Durga Prasad Paladugu <siva...@xilinx.com>
Cc: Vignesh R <vigne...@ti.com>
Cc: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Jagan Teki <jt...@openedev.com>
---
 drivers/mtd/spi/spi_flash.c |  6 +++---
 drivers/spi/cadence_qspi.c  |  2 +-
 drivers/spi/ich.c           |  6 ++----
 drivers/spi/spi-uclass.c    | 11 ++++-------
 drivers/spi/ti_qspi.c       |  6 +++---
 include/spi.h               | 14 ++++----------
 6 files changed, 17 insertions(+), 28 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5fd408c..041b64f 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1172,11 +1172,11 @@ int spi_flash_scan(struct spi_flash *flash)
 
        /* Look for read commands */
        flash->read_cmd = CMD_READ_ARRAY_FAST;
-       if (spi->mode_rx & SPI_RX_SLOW)
+       if (spi->mode & SPI_RX_SLOW)
                flash->read_cmd = CMD_READ_ARRAY_SLOW;
-       else if (spi->mode_rx & SPI_RX_QUAD && params->flags & RD_QUAD)
+       else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
                flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
-       else if (spi->mode_rx & SPI_RX_DUAL && params->flags & RD_DUAL)
+       else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
                flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
 
        /* Look for write commands */
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a5244ff..1d50f13 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -251,7 +251,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
                break;
                case CQSPI_INDIRECT_READ:
                        err = cadence_qspi_apb_indirect_read_setup(plat,
-                               priv->cmd_len, dm_plat->mode_rx, cmd_buf);
+                               priv->cmd_len, dm_plat->mode, cmd_buf);
                        if (!err) {
                                err = cadence_qspi_apb_indirect_read_execute
                                (plat, data_bytes, din);
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 00b2fed..caf0103 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -649,10 +649,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
         * ICH 7 SPI controller only supports array read command
         * and byte program command for SST flash
         */
-       if (plat->ich_version == ICHV_7) {
-               slave->mode_rx = SPI_RX_SLOW;
-               slave->mode = SPI_TX_BYTE;
-       }
+       if (plat->ich_version == ICHV_7)
+               slave->mode = SPI_RX_SLOW | SPI_TX_BYTE;
 
        return 0;
 }
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 247abfa..d9c49e4 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -164,7 +164,6 @@ static int spi_child_pre_probe(struct udevice *dev)
 
        slave->max_hz = plat->max_hz;
        slave->mode = plat->mode;
-       slave->mode_rx = plat->mode_rx;
        slave->wordlen = SPI_DEFAULT_WORDLEN;
 
        return 0;
@@ -381,7 +380,7 @@ void spi_free_slave(struct spi_slave *slave)
 int spi_slave_ofdata_to_platdata(const void *blob, int node,
                                 struct dm_spi_slave_platdata *plat)
 {
-       int mode = 0, mode_rx = 0;
+       int mode = 0;
        int value;
 
        plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -413,24 +412,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int 
node,
                break;
        }
 
-       plat->mode = mode;
-
        value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1);
        switch (value) {
        case 1:
                break;
        case 2:
-               mode_rx |= SPI_RX_DUAL;
+               mode |= SPI_RX_DUAL;
                break;
        case 4:
-               mode_rx |= SPI_RX_QUAD;
+               mode |= SPI_RX_QUAD;
                break;
        default:
                error("spi-rx-bus-width %d not supported\n", value);
                break;
        }
 
-       plat->mode_rx = mode_rx;
+       plat->mode = mode;
 
        return 0;
 }
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index bb72cb0..e51cbd0 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -336,7 +336,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv 
*priv)
                        QSPI_SETUP0_NUM_D_BYTES_8_BITS |
                        QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
                        QSPI_NUM_DUMMY_BITS);
-       slave->mode_rx = SPI_RX_QUAD;
+       slave->mode |= SPI_RX_QUAD;
 #else
        memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
                        QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv 
*priv,
                                      bool enable)
 {
        u32 memval;
-       u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
+       u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
 
        if (!enable) {
                writel(0, &priv->base->setup0);
@@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv 
*priv,
                memval |= QSPI_CMD_READ_QUAD;
                memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
                memval |= QSPI_SETUP0_READ_QUAD;
-               slave->mode_rx = SPI_RX_QUAD;
+               slave->mode |= SPI_RX_QUAD;
                break;
        case SPI_RX_DUAL:
                memval |= QSPI_CMD_READ_DUAL;
diff --git a/include/spi.h b/include/spi.h
index ca96fa4..b262e06 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -26,12 +26,10 @@
 #define SPI_TX_BYTE    BIT(8)                  /* transmit with 1 wire byte */
 #define SPI_TX_DUAL    BIT(9)                  /* transmit with 2 wires */
 #define SPI_TX_QUAD    BIT(10)                 /* transmit with 4 wires */
-
-/* SPI mode_rx flags */
-#define SPI_RX_SLOW    BIT(0)                  /* receive with 1 wire slow */
-#define SPI_RX_FAST    BIT(1)                  /* receive with 1 wire fast */
-#define SPI_RX_DUAL    BIT(2)                  /* receive with 2 wires */
-#define SPI_RX_QUAD    BIT(3)                  /* receive with 4 wires */
+#define SPI_RX_SLOW    BIT(11)                 /* receive with 1 wire slow */
+#define SPI_RX_FAST    BIT(12)                 /* receive with 1 wire fast */
+#define SPI_RX_DUAL    BIT(13)                 /* receive with 2 wires */
+#define SPI_RX_QUAD    BIT(14)                 /* receive with 4 wires */
 
 /* SPI bus connection options - see enum spi_dual_flash */
 #define SPI_CONN_DUAL_SHARED           (1 << 0)
@@ -61,13 +59,11 @@ struct dm_spi_bus {
  * @cs:                Chip select number (0..n-1)
  * @max_hz:    Maximum bus speed that this slave can tolerate
  * @mode:      SPI mode to use for this device (see SPI mode flags)
- * @mode_rx:   SPI RX mode to use for this slave (see SPI mode_rx flags)
  */
 struct dm_spi_slave_platdata {
        unsigned int cs;
        uint max_hz;
        uint mode;
-       u8 mode_rx;
 };
 
 #endif /* CONFIG_DM_SPI */
@@ -94,7 +90,6 @@ struct dm_spi_slave_platdata {
  *                     bus (bus->seq) so does not need to be stored
  * @cs:                        ID of the chip select connected to the slave.
  * @mode:              SPI mode to use for this slave (see SPI mode flags)
- * @mode_rx:           SPI RX mode to use for this slave (see SPI mode_rx 
flags)
  * @wordlen:           Size of SPI word in number of bits
  * @max_write_size:    If non-zero, the maximum number of bytes which can
  *                     be written at once, excluding command bytes.
@@ -112,7 +107,6 @@ struct spi_slave {
        unsigned int cs;
 #endif
        uint mode;
-       u8 mode_rx;
        unsigned int wordlen;
        unsigned int max_write_size;
        void *memory_map;
-- 
2.7.4

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