Hi Sandy,

On 09/21/2016 08:41 PM, Sandy Patterson wrote:


On Tue, Sep 20, 2016 at 10:56 PM, Kever Yang <kever.y...@rock-chips.com <mailto:kever.y...@rock-chips.com>> wrote:

    parameters changes from dts to auto-detect including those I
    removed from dts and ddrconfig, stride, they should be the same as
    without my patch, which means my patch suppose to not change any
    parameter for DDR other than how we get those parameters.

EARLY_DEBUG was the right idea. Only for some reason it's called EARLY_UART on rk3288.

I tested rock2 and it is getting dbw parameter of 2 instead of 1 for with the unmodified code for both channels. I'm afraid I do not know the significance of this and don't have a good way to test for stability. I am using rock2 square model a with 2gb ram.


For LPDDR3, the die bit width(dbw) is fix 2(32bits); and for DDR3 it might be dbw=1(16bit, more likely) or dbw=0(8bit), this parameter only affect the DRAM tRFC, won't affect the stability but maybe very little performance difference if we use smaller die bitwidth.

Thanks,
- Kever
Sandy

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