Fix the divider calculation logic to choose a value so that the
resulting baudrate is either equal to or closest possible baudrate less
than the requested value.

Signed-off-by: Vignesh R <[email protected]>
---
 drivers/spi/ti_qspi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 52520dff6325..d97e2479d1b3 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -16,6 +16,7 @@
 #include <asm/omap_gpio.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>
+#include <linux/kernel.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -118,7 +119,7 @@ static void ti_spi_set_speed(struct ti_qspi_priv *priv, 
uint hz)
        if (!hz)
                clk_div = 0;
        else
-               clk_div = (priv->fclk / hz) - 1;
+               clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1;
 
        debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
 
-- 
2.10.1

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