> -----Original Message----- > From: york sun > Sent: Tuesday, October 25, 2016 12:33 AM > To: Priyanka Jain <priyanka.j...@nxp.com>; u-boot@lists.denx.de; > Prabhakar Kushwaha <prabhakar.kushw...@nxp.com> > Cc: Priyanka Jain <priyanka.j...@freescale.com> > Subject: Re: [PATCH 0/5][v2] Update LS2080A SoC code to support LS2088A > SoC > > On 10/24/2016 01:32 AM, Priyanka Jain wrote: > > From: Priyanka Jain <priyanka.j...@freescale.com> > > > > LS2088A is similar to LS2080A SoC with some differences like 1)Timer > > controller offset is different 2)It has A72 cores 3)Process to release > > secondary cores is different 4)LS2088A SoC has TZASC controller > > > > In preparation of using same binary for LS2088A and LS2080A as both > > are using same development boards. code is update to detect difference > > based on SVR at runtime > > > > > > Priyanka Jain (5): > > armv8: lsch3: Use SVR based timer base address detection > > armv8: fsl-layerscape: Update TZASC registers type > > armv8: fsl-layerscape : Check SVR for initializing TZASC > > armv8: fsl-layerscape: Add NXP LS2088A SoC support > > armv8/fsl-lsch3: Update code to release secondary cores > > Priyanka, > > Does PCIe work for you? It doesn't work for my test. The same binary works > for LS2080ARDB/LS2085ARDB. Do you have other patches? I noticed several > internal commits related to LS2088A PCIe. Do we need them? > > York
There are some additional patches for PCIe for LS2088A. I have requested Mingkai to send those patches --Priyanka _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
