To use the PCIe driver, its controller memory and the PCIe regions need
to get mapped in the MMU. Otherwise these areas can't be accessed.

Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Nadav Haklai <nad...@marvell.com>
Cc: Neta Zur Hershkovits <n...@marvell.com>
Cc: Kostya Porotchkin <kos...@marvell.com>
Cc: Omri Itach <om...@marvell.com>
Cc: Igal Liberman <ig...@marvell.com>
Cc: Haim Boot <ha...@marvell.com>
Cc: Hanna Hawa <han...@marvell.com>
---
 arch/arm/mach-mvebu/armada8k/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c 
b/arch/arm/mach-mvebu/armada8k/cpu.c
index f8e69d6..2719d68 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -55,6 +55,14 @@ static struct mm_region mvebu_mem_map[] = {
                         PTE_BLOCK_NON_SHARE
        },
        {
+               /* PCI regions */
+               .phys = 0xf8000000UL,
+               .virt = 0xf8000000UL,
+               .size = 0x08000000UL,   /* 128MiB PCI space (master & slave) */
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE
+       },
+       {
                /* List terminator */
                0,
        }
-- 
2.10.2

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