[resend from correct address]
On 23 November 2016 at 09:13, Simon Glass <[email protected]> wrote: > Hi Maxim, > > On 22 November 2016 at 16:56, <[email protected]> wrote: >> From: Maxim Sloyko <[email protected]> >> >> In the absence of pinmux driver, I2C driver will be >> configuring pins directly. > > Commit subject s/Added/Add/ > > and please remove the '.' at the end. > >> >> Signed-off-by: Maxim Sloyko <[email protected]> >> --- >> arch/arm/include/asm/arch-aspeed/ast_scu.h | 5 +++++ >> arch/arm/mach-aspeed/ast-scu.c | 28 ++++++++++++++++++++++++++++ >> 2 files changed, 33 insertions(+) >> >> diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h >> b/arch/arm/include/asm/arch-aspeed/ast_scu.h >> index eb5aaa2..80ebd6f 100644 >> --- a/arch/arm/include/asm/arch-aspeed/ast_scu.h >> +++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h >> @@ -46,4 +46,9 @@ extern void ast_scu_init_eth(u8 num); >> extern void ast_scu_multi_func_eth(u8 num); >> extern void ast_scu_multi_func_romcs(u8 num); >> >> +/* Enable I2C controller and pins for a particular device. >> + * Device numbering starts at 1 >> + */ >> +extern void ast_scu_enable_i2c(u8 num); > > I suspect this should be done as a pinctrl driver. See for > drivers/pinctrl for examples. > >> + >> #endif >> diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c >> index e00dbe2..b5aa8bf 100644 >> --- a/arch/arm/mach-aspeed/ast-scu.c >> +++ b/arch/arm/mach-aspeed/ast-scu.c >> @@ -507,3 +507,31 @@ void ast_scu_get_who_init_dram(void) >> break; >> } >> } >> + >> +void ast_scu_enable_i2c(u8 bus_num) >> +{ >> + if (bus_num > SCU_I2C_MAX_BUS_NUM) { >> + debug("%s: bus_num is out of range, must be [%d - %d]\n", >> + __func__, SCU_I2C_MIN_BUS_NUM, SCU_I2C_MAX_BUS_NUM); >> + return; >> + } >> + >> + if (bus_num == 0) { >> + /* Enable I2C Controllers */ >> + clrbits_le32(AST_SCU_BASE + AST_SCU_RESET, SCU_RESET_I2C); >> + } else if (bus_num >= 3) { >> + setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL5, >> + SCU_FUN_PIN_I2C(bus_num)); >> + /* In earlier versions of the SoC these pins are always assigned to >> + * respective I2C buses and require no configuration. >> + */ >> +#ifdef AST_SOC_G5 >> + } else if (bus_num == 1) { >> + setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8, >> + SCU_FUN_PIN_SDA1 | SCU_FUN_PIN_SCL1); >> + } else if (bus_num == 2) { >> + setbits_le32(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL8, >> + SCU_FUN_PIN_SDA2 | SCU_FUN_PIN_SCL2); >> +#endif >> + } >> +} >> -- >> 2.8.0.rc3.226.g39d4020 >> > > Regards, > Simon _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
