On Mon, Nov 28, 2016 at 03:04:42PM +0530, Lokesh Vutla wrote: > This series tries to add D-cache support in spl in order to reduce boot time > either in 2stage boot or Falcon Boot.
I assume you've measured and confirmed that there is a speed increase? I ask since I'd tried this ages ago but.. > > Lokesh Vutla (3): > arch: arm: omap: Declare size of ddr very early > spl: reorder the assignment of board info to global data ... I didn't have changes like this, which is perhaps why it ended up not working right. Thanks! -- Tom
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