On 11/25/2016 02:47 AM, Hongbo Zhang wrote:
> PSCI implementation needs the SMC instruction to be enabled.
> Following the legacy codes pattern, no bit macro definition and bit operation
> are used, only the immediate data used in line is changed.
>
> Signed-off-by: Hongbo Zhang <hongbo.zh...@nxp.com>
> Reviewed-by: Tom Rini <tr...@konsulko.com>
> ---
>  arch/arm/include/asm/macro.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
> index 9bb0efa..35ea002 100644
> --- a/arch/arm/include/asm/macro.h
> +++ b/arch/arm/include/asm/macro.h
> @@ -137,7 +137,7 @@ lr        .req    x30
>
>  .macro armv8_switch_to_el2_m, xreg1
>       /* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1 */
> -     mov     \xreg1, #0x5b1
> +     mov     \xreg1, #0x531
>       msr     scr_el3, \xreg1
>       msr     cptr_el3, xzr           /* Disable coprocessor traps to EL3 */
>       mov     \xreg1, #0x33ff
>

Hongbo,

This has a conflict. Please work with Alison Wang to figure out the SMD 
bit as she has changed the code to deal with both 64- and 32-bit. I can 
guess a fix to this conflict, but rather to have her onboard.

York
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