On Tuesday 03 January 2017 07:40 PM, Jagan Teki wrote: > On Tue, Jan 3, 2017 at 2:35 PM, R, Vignesh <[email protected]> wrote: >> >> >> On 12/21/2016 10:42 AM, Vignesh R wrote: >>> According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC >>> TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit >>> data interface writes until the last word of an indirect transfer >>> otherwise indirect writes is known to fails sometimes. So, make sure >>> that QSPI indirect writes are 32 bit sized except for the last write. If >>> the txbuf is unaligned then use bounce buffer to avoid data aborts. >>> >>> So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER >>> for all boards that use Cadence QSPI driver. >>> >>> [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf >>> >>> Signed-off-by: Vignesh R <[email protected]> >>> Reviewed-by: Marek Vasut <[email protected]> >> >> Gentle ping on the series... > > Please link to other one, I couldn't find it on patchwork. >
Here are the two patches of the series: https://patchwork.ozlabs.org/patch/707648/ https://patchwork.ozlabs.org/patch/707647/ -- Regards Vignesh _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
