On Sel, 2017-03-07 at 04:45 +0100, Marek Vasut wrote:
> On 03/06/2017 05:45 AM, Chee, Tien Fong wrote:
> >
> > On Ahd, 2017-03-05 at 01:57 +0100, Marek Vasut wrote:
> > >
> > > On 03/03/2017 01:50 PM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee <tien.fong.c...@intel.com>
> > > >
> > > > This patch removes the unused passing parameter of
> > > > socfpga_bridges_reset
> > > > function in Arria10.
> > > >
> > > > Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
> > > > Cc: Marek Vasut <ma...@denx.de>
> > > > Cc: Dinh Nguyen <dingu...@kernel.org>
> > > > Cc: Ching Liang See <chin.liang....@intel.com>
> > > > Cc: Ley Foon <ley.foon....@intel.com>
> > > > Cc: Westergreen Dalon <dalon.westergr...@intel.com>
> > > We do NOT have arria10 support in mainline, I am confused.
> > > Can you please sync with Ley when submitting patches ?
> > >
> > > Thanks
> > >
> > This series is working on top of [1] initial patchset which enables
> > the basic support for Arria 10 and other features.
> > https://www.mail-archive.com/u-boot@lists.denx.de/msg240053.html
> This patchset is still work-in-progress. Sending patches on top of it
> is
> completely useless . Please work with Ley and integrate them or wait
> until the initial patchset lands.
>
Okay.
> >
> > I just realized i forgot to +CC you guys in the cover letter,
> > https://www.mail-archive.com/u-boot@lists.denx.de/msg240829.html.
> > I am sorry to have you confused.
> [...]
>
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