On Fri, Apr 7, 2017 at 3:24 AM, Fabio Estevam <[email protected]> wrote: > Hi Jagan, > > On Wed, Apr 5, 2017 at 4:20 PM, Jagan Teki <[email protected]> wrote: >> From: Jagan Teki <[email protected]> >> >> DCD register initialization from mx6dlsabresd.cfg are moved to >> SPL code in mx6dl_dcd_table. >> >> Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus. >> >> mx6dl_dcd_table reginit as >> - GPR io regs >> - DRAM io regs, >> - MMDC Calibration io regs >> - dram sdcke0 (0x020e04a4) and sdcke1(0x020e04a8) are not available >> in original mx6dlsabresd.cfg but initialized to default values. >> >> Cc: Stefano Babic <[email protected]> >> Cc: Fabio Estevam <[email protected]> >> Cc: Michael Trimarchi <[email protected]> >> Signed-off-by: Jagan Teki <[email protected]> > > Have you tested this? > > Last time I tried to convert imx6dl-sabresd to SPL it did not work, > and I haven't had a chance to debug it.
I don't have a board to test, can verify it once. thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
