> -----Original Message----- > From: Sanchayan Maity [mailto:maitysancha...@gmail.com] > Sent: Tuesday, April 11, 2017 1:42 PM > To: u-boot@lists.denx.de; sba...@denx.de; ag...@denx.de > Cc: albert.u.b...@aribaud.net; Feng Li <feng.l...@nxp.com>; > alison.w...@freescale.com; Sumit Garg <sumit.g...@nxp.com>; Stefan > Agner <stefan.ag...@toradex.com>; york sun <york....@nxp.com>; Z.Q. Hou > <zhiqiang....@nxp.com>; Xiaoliang Yang <xiaoliang.y...@nxp.com>; > Sanchayan Maity <maitysancha...@gmail.com> > Subject: [PATCH v3 3/6] video: fsl_dcu_fb: Enable pixel clock after > initialization > > From: Stefan Agner <stefan.ag...@toradex.com> > > When enabling the DCU and pixel clock, the test mode is activated since > this is the reset configuration. The test mode immediately shows a red > screen on a LCD. A moment later, the DCU gets initialized properly. > > This patch enables the pixel clock after initialization of the DCU > control register. This avoids this initial flicker on LCD screens. > > While at it change the polarity of pixel clock to display samples data > on the rising edge. > > Signed-off-by: Stefan Agner <stefan.ag...@toradex.com> > Signed-off-by: Sanchayan Maity <maitysancha...@gmail.com> > --- > drivers/video/fsl_dcu_fb.c | 13 ++++++------- > 1 file changed, 6 insertions(+), 7 deletions(-) > Reviewed-by: Alison Wang <alison.w...@nxp.com>
Best Regards, Alison Wang _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
