Hi Andreas,

    Thanks for fixing my pool English, will update in next version.

Thanks,
- Kever
On 04/19/2017 09:00 PM, Andreas Färber wrote:
Hi Kever,

Some grammar nits below:

Am 19.04.2017 um 08:42 schrieb Kever Yang:
There are 3 region used by rk3399 ATF:
"regions"

- bl31 code, locate at 0x10000;
- cortex-m0 code and data, locate at 0xff8c0000;
- bl31 data, locate at 0xff8c1000 ~ 0xff8c4000;
3x "located"

SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will have memory corrupt after SPL
"there will be" or "we will have"

load ATF image.
"loads the" / "loaded the"

More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890
Interesting!

Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
---

Changes in v2:
- use Kconfig for the reserved memory size

  arch/arm/include/asm/arch-rockchip/boot0.h | 4 ++++
  arch/arm/mach-rockchip/Kconfig             | 8 ++++++++
  2 files changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h 
b/arch/arm/include/asm/arch-rockchip/boot0.h
index 8d7bc9a..7346876 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -16,3 +16,7 @@
        .space 0x4         /* space for the 'RK33' */
  #endif
        b reset
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+       .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index af0796d..979b48e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -72,6 +72,14 @@ config ROCKCHIP_SPL_BACK_TO_BROM
            SPL will return to the boot rom, which will then load the U-Boot
            binary to keep going on.
+config ROCKCHIP_SPL_RESERVE_IRAM
+       hex "Size of IRAM reserved in SPL"
+       default 0x4000
+       help
+         SPL may need reserve memory for firmware load by SPL, which load
+         address is in IRAM and may overlay with SPL text area if not
+         reserved.
"SPL may need to reserve memory for firmware loaded by SPL, whose load
address is in IRAM and may overlap with SPL text area if not reserved."

+
  config ROCKCHIP_BROM_HELPER
        bool
Regards,
Andreas



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