On Fri, Jun 02, 2017 at 06:07:12PM +0530, Sekhar Nori wrote: > As per the datasheet[1] available for DDR2 part on board > the OMAP-L138 LCDK, the tXSNR (exit self refresh to a > non-read command) is 137.5 ns. This corresponds to a > value of 20 to be written to T_XSNR register field of > OMAP-L138's DDR configuration. The DDR2 is at 150 MHz. > > Fix this. The correct value also appears on the initialization > scripts (called CCS GEL files) available on TI's wiki pages[2] > > [1] > http://www.samsung.com/global/business/semiconductor/file/product/ds_k4t1gxx4qf_rev12-0.pdf > [2] > http://processors.wiki.ti.com/index.php/L138/C6748_Development_Kit_(LCDK)#CCS_XML_.26_GEL_Files > > Signed-off-by: Sekhar Nori <nsek...@ti.com> > Reviewed-by: Tom Rini <tr...@konsulko.com>
Applied to u-boot/master, thanks! -- Tom
signature.asc
Description: Digital signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
