Hi, On Tue, Jun 20, 2017 at 12:26:21PM -0600, Simon Glass wrote: > Hi Maxime, > > On 20 June 2017 at 00:45, Maxime Ripard > <maxime.rip...@free-electrons.com> wrote: > > Hi Simon, > > > > On Mon, Jun 19, 2017 at 11:11:31AM -0600, Simon Glass wrote: > >> Move this board over to driver model for MMC and SATA. This means that it > >> uses CONFIG_BLK as well. In SPL these options remain turned off since it > >> increases the code size. One option would be to use CONFIG_SPL_OF_PLATDATA > >> to avoid device-tree overhead. > >> > >> Signed-off-by: Simon Glass <s...@chromium.org> > >> --- > >> > >> arch/arm/dts/sun7i-a20-pcduino3.dts | 1 - > >> configs/Linksprite_pcDuino3_defconfig | 7 ++++++- > >> 2 files changed, 6 insertions(+), 2 deletions(-) > >> > >> diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts > >> b/arch/arm/dts/sun7i-a20-pcduino3.dts > >> index 1a8b39be1d..d487c84562 100644 > >> --- a/arch/arm/dts/sun7i-a20-pcduino3.dts > >> +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts > >> @@ -164,7 +164,6 @@ > >> pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; > >> vmmc-supply = <®_vcc3v3>; > >> bus-width = <4>; > >> - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ > > > > Why is this change needed ? Is that the wrong GPIO? Should that be > > submitted to Linux too? > > I meant to ask about that in the commit message. > > For me this does not work. Maybe there is something wrong with my > board. Are you able to test it?
Judging from http://learn.linksprite.com/wp-content/uploads/2014/04/0015.jpg and http://learn.linksprite.com/wp-content/uploads/2014/04/0006.jpg It really seems like there is a card-detect on that pin, but maybe active low? I don't have that board unfortunately... Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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