> dwmmc controller has default internal divider by 2, > sync code for all Rockchip SoC with: > 4055b46 rockchip: clk: rk3288: fix mmc clock setting > > Signed-off-by: Kever Yang <[email protected]> > --- > > drivers/clk/rockchip/clk_rk3036.c | 6 +++--- > drivers/clk/rockchip/clk_rk3188.c | 4 ++-- > drivers/clk/rockchip/clk_rk322x.c | 6 +++--- > drivers/clk/rockchip/clk_rk3328.c | 8 ++++---- > drivers/clk/rockchip/clk_rk3399.c | 11 +++++++---- > 5 files changed, 19 insertions(+), 16 deletions(-) >
Acked-by: Philipp Tomsich <[email protected]> _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
