Hi Bin,

On 06.08.2017 02:48, Bin Meng wrote:
On Sun, Aug 6, 2017 at 12:49 AM, Stefan Roese <s...@denx.de> wrote:
This patch adds the infrastructure to define different config headers
with different configurations and default environment for the baseboards
that can now be selected via Kconfig. The new configuration for the
theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig
file for this new target is added.

Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Simon Glass <s...@chromium.org>
Cc: Bin Meng <bmeng...@gmail.com>
---
v3:
- Rebased on latest master
- Removed unused macros from config headers

v2:
- Added Bin's reviewed-by

  board/congatec/Kconfig                             | 11 ++++
  board/congatec/conga-qeval20-qa3-e3845/Kconfig     |  7 +--
  board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS |  2 +
  configs/theadorable-x86-conga-qa3-e3845_defconfig  | 58 ++++++++++++++++++++++
  include/configs/theadorable-x86-conga-qa3-e3845.h  | 38 ++++++++++++++
  5 files changed, 111 insertions(+), 5 deletions(-)
  create mode 100644 configs/theadorable-x86-conga-qa3-e3845_defconfig
  create mode 100644 include/configs/theadorable-x86-conga-qa3-e3845.h

diff --git a/board/congatec/Kconfig b/board/congatec/Kconfig
index ff5a1d84a1..fb341bf24c 100644
--- a/board/congatec/Kconfig
+++ b/board/congatec/Kconfig
@@ -24,6 +24,17 @@ config TARGET_CONGA_QEVAL20_QA3_E3845
           Note that PCIE_ECAM_BASE is set up by the FSP so the value used
           by U-Boot matches that value.

+config TARGET_THEADORABLE_X86_CONGA_QA3_E3845
+       bool "theadorable-x86 baseboard & conga-QA3/E3845"
+       help
+         This is the theadorable-x86 baseboard board equipped with the
+         conga-QA3/E3845-4G SoM. It contains an Atom E3845 with Ethernet,
+         micro-SD, USB 2, USB 3, SATA, serial console and HDMI 1.3 video
+         out. It requires some binary blobs - see README.x86 for details.
+
+         Note that PCIE_ECAM_BASE is set up by the FSP so the value used
+         by U-Boot matches that value.
+
  endchoice

  source "board/congatec/conga-qeval20-qa3-e3845/Kconfig"
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Kconfig 
b/board/congatec/conga-qeval20-qa3-e3845/Kconfig
index c2649d299f..a3673a66bd 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Kconfig
+++ b/board/congatec/conga-qeval20-qa3-e3845/Kconfig
@@ -1,5 +1,3 @@
-if TARGET_CONGA_QEVAL20_QA3_E3845
-
  config SYS_BOARD
         default "conga-qeval20-qa3-e3845"

@@ -10,7 +8,8 @@ config SYS_SOC
         default "baytrail"

  config SYS_CONFIG_NAME
-       default "conga-qeval20-qa3-e3845"
+       default "conga-qeval20-qa3-e3845" if TARGET_CONGA_QEVAL20_QA3_E3845
+       default "theadorable-x86-conga-qa3-e3845" if 
TARGET_THEADORABLE_X86_CONGA_QA3_E3845

  config SYS_TEXT_BASE
         default 0xfff00000 if !EFI_STUB
@@ -27,5 +26,3 @@ config BOARD_SPECIFIC_OPTIONS # dummy

  config PCIE_ECAM_BASE
         default 0xe0000000
-
-endif
diff --git a/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS 
b/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
index 3d7e8e2d61..6e065590ab 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
+++ b/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
@@ -3,6 +3,8 @@ M:      Stefan Roese <s...@denx.de>
  S:     Maintained
  F:     board/congatec/conga-qeval20-qa3-e3845
  F:     include/configs/conga-qeval20-qa3-e3845.h
+F:     include/configs/theadorable-x86-conga-qa3-e3845.h
  F:     configs/conga-qeval20-qa3-e3845_defconfig
  F:     configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+F:     configs/theadorable-x86-conga-qa3-e3845_defconfig
  F:     arch/x86/dts/conga-qeval20-qa3-e3845.dts
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig 
b/configs/theadorable-x86-conga-qa3-e3845_defconfig
new file mode 100644
index 0000000000..366ea0b939
--- /dev/null
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -0,0 +1,58 @@
+CONFIG_X86=y
+CONFIG_VENDOR_CONGATEC=y
+CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y
+CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
+CONFIG_INTERNAL_UART=y
+CONFIG_DEBUG_UART=y
+CONFIG_SMP=y
+CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_SEABIOS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CPU=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_INTEL=y
+CONFIG_WINBOND_W83627=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_WINBOND=y

Please check if all these flash are needed. (related previous commit:
http://patchwork.ozlabs.org/patch/795356/)

You are correct, this is inconsistent with the other board in
regard to the flash chip selection. Currently we are not using
Gigadevice and Macronix so I will remove these devices in the
next patch version.

Thanks,
Stefan
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