> -----Original Message----- > From: York Sun > Sent: Tuesday, August 08, 2017 3:31 AM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de > Cc: Priyanka Jain <priyanka.j...@nxp.com> > Subject: Re: [PATCH 1/1] board: ls2080ardb: Add fsl_fdt_fixup_flash > > On 07/05/2017 05:32 AM, Santan Kumar wrote: > > IFC and QSPI are muxed on board. > > > > Add fsl_fdt_fixup_flash() > > -To disable IFC node in dts if QSPI is enabled. > > -Or disable QSPI node in dts if IFC is enabled. > > The pin mux is at SoC level. Can you put this fixup at SoC level? > > York At Soc level, some of IFC pins (not all) are mux-ed with QSPI lines. So, it is possible to provide NAND functionality with QSPI if the board allows.
But in this case at board level, complete IFC is mux-ed with QSPI. So, we have put this code in board file. Priyanka _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot