On 08/07/2017 11:56 PM, Xiaowei Bao wrote:
> Hi York,
> 
> I will pay attention to the case of the case in commit message.
> 
> This patch is for some special reset times for longer pcie devices, in this 
> case, the pcie device may on polling compliance state, the RC considers the 
> pcie device is link up, but the pcie device is not link up, only the L0 state 
> is link up state. So add the link up status judgement mechanisms.
> 
> About 100ms timeout, the pcie spec does not specify the link up timeout time, 
> and the link up state is determined by a state machine. The state machine 
> implementation is relatively complex, refer to uboot of other platform pcie 
> link up state to determine the realization of the mechanism, we evaluated a 
> timeout, in detect state consider the pcie device is link down, in L0 state 
> consider the pcie device is link up, within  100ms in other states can be 
> restored to the L0 state considers the pcie device is link up .

Can you put this information to inline comment? It will help us when we 
read the code later.

Thanks.

York
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to