On Sat, Aug 26, 2017 at 9:55 PM, Bin Meng <bmeng...@gmail.com> wrote: > Hi Simon, > > On Sat, Aug 26, 2017 at 9:39 PM, Simon Glass <s...@chromium.org> wrote: >> On 15 August 2017 at 23:41, Bin Meng <bmeng...@gmail.com> wrote: >>> This adds initial Intel Braswell SoC support. It uses Intel FSP >>> to initialize the chipset. >>> >>> Similar to its predecessor BayTrail, there are some work to do to >>> enable the legacy UART integrated in the Braswell SoC. >>> >>> Signed-off-by: Bin Meng <bmeng...@gmail.com> >>> --- >>> >>> arch/x86/Kconfig | 1 + >>> arch/x86/cpu/Makefile | 1 + >>> arch/x86/cpu/braswell/Kconfig | 38 +++++++ >>> arch/x86/cpu/braswell/Makefile | 7 ++ >>> arch/x86/cpu/braswell/braswell.c | 36 ++++++ >>> arch/x86/cpu/braswell/cpu.c | 170 >>> +++++++++++++++++++++++++++++ >>> arch/x86/cpu/braswell/early_uart.c | 86 +++++++++++++++ >>> arch/x86/include/asm/arch-braswell/iomap.h | 50 +++++++++ >>> 8 files changed, 389 insertions(+) >>> create mode 100644 arch/x86/cpu/braswell/Kconfig >>> create mode 100644 arch/x86/cpu/braswell/Makefile >>> create mode 100644 arch/x86/cpu/braswell/braswell.c >>> create mode 100644 arch/x86/cpu/braswell/cpu.c >>> create mode 100644 arch/x86/cpu/braswell/early_uart.c >>> create mode 100644 arch/x86/include/asm/arch-braswell/iomap.h >> >> Reviewed-by: Simon Glass <s...@chromium.org> >> >> A few nits / suggestions below. >> >>>
[snip] >>> +static void gpio_select_func(int community, int family, int pad, int func) >>> +{ >>> + uint32_t reg; >>> + uint32_t pconf0_addr = gpio_pconf0(community, family, pad); >>> + >>> + reg = readl(pconf0_addr); >>> + reg &= ~(0xf << 16); >>> + reg |= (func << 16); >>> + writel(reg, pconf0_addr); >> >> Can we use setclrbits_le32()? > > Will do in v2. > Changed to use clrsetbits_le32(), and >> >>> +} >>> + >>> +static void x86_pci_write_config32(int dev, unsigned int where, u32 value) >>> +{ >>> + unsigned long addr; >>> + >>> + addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3); >>> + writel(value, addr); >>> +} >>> + applied to u-boot-x86, thanks! _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot