Hi Patrice,

> -----Original Message-----
> From: Patrice CHOTARD
> Sent: Monday, November 13, 2017 8:26 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> The SDRAM region was setup with the wrong attributes.
> It must be set to :
>   _ XN_EN (Execution of an instruction fetched from this region permitted)
>   _ O_I_WB_RD_WR_ALLOC (Outer and inner write-back, write and read allocate)
> 

H7 mpu configuration seems same as F7, can we have one config for F7 & H7.

> This fixes hard fault when trying to load and execute kernel linux in this 
> area.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

In any case,
Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/stm32h7/soc.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32/stm32h7/soc.c 
> b/arch/arm/mach-stm32/stm32h7/soc.c
> index 692dbcc..e0d3f11 100644
> --- a/arch/arm/mach-stm32/stm32h7/soc.c
> +++ b/arch/arm/mach-stm32/stm32h7/soc.c
> @@ -30,9 +30,12 @@ int arch_cpu_init(void)
>               { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
>               O_I_WB_RD_WR_ALLOC, REGION_4GB },
> 
> -             /* Code area, executable & strongly ordered */
> -             { 0xD0000000, REGION_1, XN_EN, PRIV_RW_USR_RW,
> -             STRONG_ORDER, REGION_8MB },
> +             /*
> +              * Code area, executable, Outer and inner write-back,
> +              * no write allocate
> +              */
> +             { 0xD0000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
> +             O_I_WB_RD_WR_ALLOC, REGION_32MB },
> 
>               /* Device area in all H7 : Not executable */
>               { 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
> --
> 1.9.1

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