On 10/30/2017 02:58 PM, Scott Wood wrote: > On Mon, 2017-10-30 at 18:50 +0000, York Sun wrote: >> On 10/20/2017 03:43 AM, Kurt Kanzenbach wrote: >>> Currently the chipselect used to identify the corresponding NAND chip is >>> stored >>> at the controller and only set during fsl_ifc_chip_init(). This way, only >>> the >>> last NAND chip is working, as the previous value of cs_nand gets >>> overwritten. >>> >>> In order to solve this issue the chipselect is computed on demand by >>> evaluating >>> the bank variable. Thus, the correct chipselect for each NAND chip >>> operation is >>> used. >>> >>> Tested on hardware with two NAND chips connected to the IFC controller. >>> >>> Signed-off-by: Kurt Kanzenbach <k...@linutronix.de> >>> --- >>> Changes for v2: >>> - get rid of cs_nand and compute chipselect on demand >>> - pass priv instead of mtd to fsl_ifc_sram_init() >> >> Scott, >> >> Are you OK with this version? Somehow this patch was assigned me. I can >> bring it in if you ack it. > > Acked-by: Scott Wood <o...@buserror.net> >
Applied to fsl-qoriq master. Thanks. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot