On 02/06/2018 03:25 PM, Jagan Teki wrote: > Enable OTG device clkgate and reset for H3/H5 > > Signed-off-by: Jagan Teki <[email protected]> > Suggested-by: Jun Nie <[email protected]> > --- > Note: > Since the driver is dm-driver, we even add SOC changes based on > compatible or driver_data but here few of the reset and clock bits > and register offset memebers are in SOC includes files. > > I even try to add driver code by adding config structure in .data > but that eventually increasing size. > All these code will anyway move to clock and reset framework > once dm support added. > > arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 1 + > drivers/usb/musb-new/sunxi.c | 24 ++++++++++++++++++------ > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h > b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h > index d794e16..6569883 100644 > --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h > +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h > @@ -288,6 +288,7 @@ struct sunxi_ccm_reg { > #define AHB_GATE_OFFSET_USB_EHCI1 27 > #define AHB_GATE_OFFSET_USB_EHCI0 26 > #endif > +#define AHB_GATE_OFFSET_OTG_DEVICE 23 > #ifdef CONFIG_MACH_SUN50I > #define AHB_GATE_OFFSET_USB0 23 > #elif !defined(CONFIG_MACH_SUN8I_R40) > diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c > index 562d311..7d94936 100644 > --- a/drivers/usb/musb-new/sunxi.c > +++ b/drivers/usb/musb-new/sunxi.c > @@ -80,6 +80,8 @@ struct sunxi_glue { > struct musb_host_data mdata; > struct sunxi_ccm_reg *ccm; > struct device dev; > + u32 rst_bit; > + u32 clkgate_bit;
Until we reach 256bit systems, this can be u8 [...] -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
