From: Patrice Chotard <patrice.chot...@st.com> DSI clock is available on STM32F769-disco and STM32F469-disco board.
Signed-off-by: Yannick Fertre <yannick.fer...@st.com> Signed-off-by: Patrice Chotard <patrice.chot...@st.com> --- drivers/clk/clk_stm32f.c | 2 +- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c index a683911ebf00..d8eab1a88d7c 100644 --- a/drivers/clk/clk_stm32f.c +++ b/drivers/clk/clk_stm32f.c @@ -432,7 +432,7 @@ static ulong stm32_clk_get_rate(struct clk *clk) return (sysclk >> stm32_get_apb_shift(regs, APB1)); /* APB2 CLOCK */ - case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(LTDC): + case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(DSI): switch (clk->id) { /* * particular case for SDMMC1 and SDMMC2 : diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index 44c091449381..c9087f5f3dac 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -106,6 +106,7 @@ #define STM32F7_RCC_APB2_SAI1 22 #define STM32F7_RCC_APB2_SAI2 23 #define STM32F7_RCC_APB2_LTDC 26 +#define STM32F7_RCC_APB2_DSI 27 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot