Hi Stefano,

> If the bootcounter address is in a cached memory,
> a flush of dcache must occur after updateing the bootcounter.
> 
> Issue found on i.MX6 where bootcounter is put into the internal
> (cached) IRAM.
> 
> Signed-off-by: Stefano Babic <sba...@denx.de>
> ---
>  drivers/bootcount/bootcount.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/bootcount/bootcount.c
> b/drivers/bootcount/bootcount.c index d5ce450..48594a6 100644
> --- a/drivers/bootcount/bootcount.c
> +++ b/drivers/bootcount/bootcount.c
> @@ -59,6 +59,9 @@ __weak void bootcount_store(ulong a)
>       raw_bootcount_store(reg, a);
>       raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC);
>  #endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD */
> +     flush_dcache_range(CONFIG_SYS_BOOTCOUNT_ADDR,
> +                             CONFIG_SYS_BOOTCOUNT_ADDR +
> +                             CONFIG_SYS_CACHELINE_SIZE);

Is it safe to flush the whole cache line?

For iMX6Q I do use SNVS_LPGR register (0x020CC068). It will preserve
its content after reset caused by WDT (also reset command in u-boot).
I also do use the SINGLEWORD to store "magic" and boot count in a
single 32 bit number.

You may also want to consider using SRC_GPRx registers:
https://community.nxp.com/message/985790?commentID=985790&et=watches.email.thread#comment-985790

As it shall be safe to use them for bootcount scenario. However, I do
prefer SNVS_LPGR.

>  }
>  
>  __weak ulong bootcount_load(void)




Best regards,

Lukasz Majewski

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